TLC320AD50CSLASHI datasheet(19/54 Pages) TI2

19 / 54 page

2–4

does not need to be addressed during the secondary communications interval. The no-op command (DS15–DS8 all

set to 0) addresses the pseudoregister (register 0), and no register programming takes place during the

communications.

In addition, each register can be read back through DOUT during secondary communications by setting the read bit

(DS13) to 1. When the register is in the read mode, no data can be written to the register during this cycle. DS13 must

be cleared to write to the register.

For example, if the contents of control register 1 is desired to be read out from DOUT, the following procedure must

be performed through DIN:

Request secondary communication by setting either D0 = 1 (software request) or FC = high (hardware

request) during the primary communication interval.

At the secondary communication interval (FS), send data in the following format in through DIN:

read

control register 1

DS15

DS0

Then the following data will be read from DOUT, the last 8 bits of DOUT will contain the register 1 data.

read

control register 1

data

M/S

DS15

DS0

Figure 2–5 is a timing diagram of this procedure.

DIN

DOUT

Low 8 Bits (DS0–DS7) are the

Content of Register 1

Figure 2–5. Register 1 Read Operation Timing Diagram

If control register 1 needs to be programmed, the following procedure must be performed through DIN:

Request secondary communication by setting either D0 = 1 (software request) or FC = high (hardware

request) during the primary communication interval.

At the secondary communication interval (FS), send data in the following format in through DIN:

write

control register 1

data

DS15

DS0

Then the following data is generated from DOUT:

write

control register 1

M/S

DS15

DS0

TLC320AD50C/I Datasheet(PDF) 19 Page - Texas Instruments

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