PIC16F753 datasheet(77/230 Pages) MICROCHIP

77 / 230 page

 2013-2015 Microchip Technology Inc.

DS40001709C-page 77

PIC16F753/HV753

10.2.5

COMPARE DURING SLEEP

The Compare mode is dependent upon the system

clock (FOSC) for proper operation. Since FOSC is shut

down during Sleep mode, the Compare mode will not

function properly during Sleep.

TABLE 10-3:

SUMMARY OF REGISTERS ASSOCIATED WITH COMPARE

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

on Page

CCP1CON

—

DC1B<1:0>

CCP1M<3:0>

CCPR1L

CCPR1L<7:0>

CCPR1H

CCPR1H<7:0>

INTCON

GIE

PEIE

T0IE

INTE

IOCIE

T0IF

INTF

IOCIF

PIE1

TMR1GIE

ADIE

—

HLTMR2IE

HLTMR1IE

TMR2IE

TMR1IE

PIE2

—

C2IE

C1IE

—

COG1IE

—

CCP1IE

PIR1

TMR1GIF

ADIF

—

HLTMR2IF

HLTMR1IF

TMR2IF

TMR1IF

PIR2

—

C2IF

C1IF

—

COG1IF

—

CCP1IF

T1CON

TMR1CS<1:0>

T1CKPS<1:0>

T1OSCEN

T1SYNC

—TMR1ON

T1GCON

TMR1GE T1GPOL

T1GTM

T1GSPM

T1GGO/

DONE

T1GVAL

T1GSS<1:0>

TMR1H

TMR1H<7:0>

57*

TMR1L

TMR1L<7:0>

57*

TRISA

—

TRISA5

TRISA4

TRISA3(1)

TRISA2

TRISA1

TRISA0

Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by Compare mode.

Page provides register information.

Note 1:

TRISA3 always reads ‘1’.

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