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STM32L496QGI3 Datasheet(PDF) 128 Page - STMicroelectronics

Part # STM32L496QGI3
Description  Ultra-low-power ARM® Cortex®-M4 32-bit MCUFPU, 100DMIPS, up to 1MB Flash, 320KB SRAM, USB OTG FS, audio, ext. SMPS
PDF  262 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L496QGI3 Datasheet(HTML) 128 Page - STMicroelectronics

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Electrical characteristics
STM32L496xx
128/262
DocID029173 Rev 1
Table 36. Typical current consumption in Run modes, with different codesrunning from
Flash, ART disable and power supplied by external SMPS (VDD12 = 1.10 V)
Symbol
Parameter
Conditions(1)
TYP
Unit
TYP
Unit
-
Voltage
scaling
Code
25 °C
25 °C
IDD_ALL
(Run)
Supply
current in
Run mode
fHCLK = fHSE up to
48 MHz included,
bypass mode
PLL ON above
48 MHz
all peripherals
disable
Reduced code(2)
1.34
mA
51
µA/MHz
Coremark
1.23
47
Dhrystone 2.1
1.23
47
Fibonacci
1.13
44
While(1)
1.04
40
Reduced code(1)
3.59
45
Coremark
3.35
42
Dhrystone 2.1
3.38
42
Fibonacci
3.11
39
While(1)
3.10
39
1. All values are obtained by calculation based on measurements done without SMPS and using following parameters: SMPS
input = 3.3 V, SMPS efficiency = 85%, VDD12 = 1.10 V
2. Reduced code used for characterization results provided in Table 26, Table 28, Table 30.
Table 37. Typical current consumption in Run modes, with different codesrunning from
Flash, ART disable and power supplied by external SMPS (VDD12 = 1.05 V)
Symbol
Parameter
Conditions(1)
TYP
Unit
TYP
Unit
-
Voltage
scaling
Code
25 °C
25 °C
IDD_ALL
(Run)
Supply
current in
Run mode
fHCLK = fHSE up to
48 MHz included,
bypass mode
PLL ON above
48 MHz
all peripherals
Reduced code(2)
1.22
mA
47
µA/MHz
Coremark
1.12
43
Dhrystone 2.1
1.12
43
Fibonacci
1.03
40
While(1)
0.95
37
1. All values are obtained by calculation based on measurements done without SMPS and using following parameters: SMPS
input = 3.3 V, SMPS efficiency = 85%, VDD12 = 1.05 V
2. Reduced code used for characterization results provided in Table 26, Table 28, Table 30.



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