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LM3555 Datasheet(PDF) 7 Page - Texas Instruments |
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LM3555 Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 37 page  7 LM3555 www.ti.com SNVS594G – DECEMBER 2008 – REVISED APRIL 2016 Product Folder Links: LM3555 Submit Documentation Feedback Copyright © 2008–2016, Texas Instruments Incorporated 6.6 Control Interface Timing Requirements MIN NOM MAX UNIT TI2C-Start I2C logic start-up time (I2C/EN going high) 250 500 µsec ƒSCL SCL clock frequency 400 kHz tI2C I2C hang-up time 35 msec tLOW Low Period of SCL clock 1.3 µsec tHIGH High Period of SCL clock 0.6 µsec tHD-STA Hold Time (repeated) START condition 0.6 µsec tSU-STA Setup time for a repeated START condition 0.6 µsec tHD-DAT Data hold time 0 µsec tSU-DAT Data setup time 100 nsec tR Rise time for SCL and SDA 300 nsec tF Fall time for SCL and SDA 300 nsec tSU-STO Setup time for stop condition 0.6 µsec tBUF Bus free time between stop and start condition 1.3 µsec tVD-DAT Data valid time 0.9 µsec tVD-ACK Data valid acknowledge time 0.9 µsec CB Capacitive load for each bus line 20 + 0.1 × CB 400 pF |
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