TAS3202 datasheet(32/69 Pages) TI2

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TAS3202

SLES208B – JUNE 2009 – REVISED MARCH 2011

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Digital Audio Processor (DAP) Arithmetic Unit

The DAP arithmetic unit is a fixed-point computational engine consisting of an arithmetic unit and data and

coefficient memory blocks. The primary features of the DAP are:

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Two-pipe parallel processing architecture

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48-bit data path with 76-bit accumulator

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Hardware single cycle multiplier (28×48)

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Three 48-bit general-purpose data registers and one 28-bit coefficient register

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Four simultaneous operations per machine cycle

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Shift right, shift left, and bimodal clip

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Log2/Alog2

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Magnitude Truncation

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Hardware acceleration units

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Soft volume controller

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Delay memory

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Dither generator

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Log2/2× estimator

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1024 + 768 dual-port ports words of data (24 and 48 bits, respectively)

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1228 words of coefficient memory (28 bits)

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3K word of program RAM (55 bits)

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5.88K words of 24-bits delay memory (1.22 ms)

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Coefficient RAM, data RAM, LFSR seed, program counter, and memory pointers are all mapped into

the same memory space for convenient addressing by the microcontroller.

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Memory interface block contains four pointers, two for data memory and two for coefficient memory.

Digital Audio Processor (DAP) Arithmetic Unit

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