| Electronic Components Datasheet Search |
|
DIX4192 Datasheet(PDF) 45 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
DIX4192 Datasheet(HTML) 45 Page - Texas Instruments |
|
45 / 71 page ![]() 45 DIX4192 www.ti.com SBFS031F – FEBRUARY 2006 – REVISED SEPTEMBER 2016 Product Folder Links: DIX4192 Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated 9.5.2.2 Registers 29 through 2C: IEC61937 PC/PD Burst Preamble The PC and PD burst preambles are part of the IEC61937 standard for transmission of data reduced, non-PCM audio over a standard two-channel interface (IEC60958). Examples of data-reduced formats include Dolby AC-3, DTS, various flavors of MPEG audio (including AAC), and Sony ATRAC. The PA and PB preambles provide synchronization data, and are fixed values of 0xF872 and 0x4E1F, respectively. The PC preamble indicates the type of data being carried by the interface and the PD preamble indicates the length of the burst, given as number of bits. Registers 0x29 through 0x2C contain the PC and PD preambles as decoded by the DIR block. Figure 64. Register 29: Burst Preamble PC High-Byte Status Register (Read-Only) 7 (MSB) 6 5 4 3 2 1 0 (LSB) PC15 PC14 PC13 PC12 PC11 PC10 PC09 PC08 Figure 65. Register 2A: Burst Preamble PC Low-Byte Status Register (Read-Only) 7 (MSB) 6 5 4 3 2 1 0 (LSB) PC07 PC06 PC05 PC04 PC03 PC02 PC01 PC00 Table 33. Register 2A: Burst Preamble PC Low-Byte Status Register (Read-Only) Field Descriptions PC[4:0], Hex Data Type 00 Null 01 Dolby AC-3 02 Reserved 03 Pause 04 MPEG-1 layer 1 05 MPEG-1 layer 2 or 3, or MPEG-2 without extension 06 MPEG-2 Data with extension 07 MPEG-2 AAC ADTS 08 MPEG-2 layer 1 low sample rate 09 MPEG-2 layer 2 or 3 low sample rate 0A Reserved 0B DTS type 1 0C DTS type 2 0D DTS type 3 0E ATRAC 0F ATRAC2/3 10-1F Reserved Bits PC[6:5] are both set to 0. Bit PC[7] is an Error Flag, where: 0 = A valid burst-payload; 1 = Burst-payload may contain errors. Bits PC[12:8] are data-type dependent. Bits PC[15:13] indicate the stream number, which is set to 0. Figure 66. Register 2B: Burst Preamble PD High-Byte Status Register (Read-Only) 7 (MSB) 6 5 4 3 2 1 0 (LSB) PD15 PD14 PD13 PD12 PD11 PD10 PD09 PD08 Figure 67. Register 2C: Burst Preamble PD Low-Byte Status Register (Read-Only) 7 (MSB) 6 5 4 3 2 1 0 (LSB) PD07 PD06 PD05 PD04 PD03 PD02 PD01 PD00 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |