LM5035

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SNVS428H – JANUARY 2006 – REVISED OCTOBER 2015

VIN = 72 VDC

Trace 1: Q2 drain voltage V/div = 10 V

VIN = 48 VDC

Upper trace: SR1, Q4 gate V/div = 5 V

IOUT = 5 A

Horizontal resolution = 1 µs/div

IOUT = 5 A

Middle trace: HS, Q2 drain V/div = 20 V

Lower trace: SR2, Q6 gate V/div = 5 V

Horizontal resolution = 1 µs/div

Figure 31. Drain Voltage of Q1 With a 5-A Load

Figure 32. Gate Voltages of the Synchronous Rectifiers

9 Power Supply Recommendations

The LM5035 can be used to control power levels up to 500 W; therefore, the current levels can be considerable.

Care must be taken in choosing components with the correct current rating which includes: magnetic

components, power MOSFETS and diodes, connectors, and wire sizes. Input and output capacitors must have

the correct ripple current rating. The use of a multilayer PCB is recommended with a copper area chosen to

ensure the LM5035 operates below the maximum junction temperature.

Full power loading must never be attempted without providing for adequate cooling.

10 Layout

10.1 Layout Guidelines

The LM5035 current sense and PWM comparators are very fast, and they respond to short duration noise

pulses. The components at the CS, COMP, SS, OVP, UVLO, DLY, and the RT pins must be as physically close

to the device as possible, thereby minimizing noise pickup on the PC board tracks.

Layout considerations are critical for the current sense filter. If a current sense transformer is used, both leads of

the transformer secondary must be routed to the sense filter components and to the IC pins. The ground side of

the transformer must be connected through a dedicated PC board track to the AGND pin rather than through the

ground plane.

If the current sense circuit employs a sense resistor in the drive transistor source, low inductance resistors must

be used. In this case, all the noise sensitive, low-current ground tracks must be connected in common near the

device, and then a single connection made to the power ground (sense resistor ground point).

The gate drive outputs of the LM5035 must have short, direct paths to the power MOSFETs to minimize

inductance in the PC board traces. The SR control outputs must also have minimum routing distance through the

pulse transformers and through the secondary gate drivers to the sync FETs.

The two ground pins (AGND, PGND) must be connected together with a short, direct connection, to avoid jitter

due to relative ground bounce.

If the internal dissipation of the LM5035 produces high junction temperatures during normal operation, the use of

multiple vias under the IC to a ground plane can help conduct heat away from the IC. Judicious positioning of the

PC board within the end product, along with use of any available air flow (forced or natural convection) will help

reduce the junction temperatures. If using forced air cooling, avoid placing the LM5035 in the airflow shadow of

tall components, such as input capacitors.

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