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LM5025AMTC/NOPB Datasheet(PDF) 3 Page - Texas Instruments

Part # LM5025AMTC/NOPB
Description  LM5025A Active Clamp Voltage Mode PWM Controller
PDF  34 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

LM5025AMTC/NOPB Datasheet(HTML) 3 Page - Texas Instruments

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1
VIN
16
UVLO
2
RAMP
15
SYNC
3
CS1
14
RT
4
CS2
13
COMP
5
TIME
12
SS
6
REF
11
AGND
7
VCC
10
PGND
8
OUT_A
9
OUT_B
Not to scale
3
LM5025A
www.ti.com
SNVS293F – DECEMBER 2004 – REVISED AUGUST 2016
Product Folder Links: LM5025A
Submit Documentation Feedback
Copyright © 2004–2016, Texas Instruments Incorporated
5 Pin Configuration and Functions
PW or NHQ Packages
16-Pin TSSOP or WSON
Top View
Pin Functions
PIN
I/O
DESCRIPTION
APPLICATION INFORMATION
NO.
NAME
1
VIN
I
Source input voltage
Input to start-up regulator. Input range 13 V to 90 V,
with transient capability to 105 V.
2
RAMP
I
Modulator ramp signal
An external RC circuit from Vin sets the ramp slope.
This pin is discharged at the conclusion of every
cycle by an internal FET, initiated by either the
internal clock or the V × Sec Clamp comparator.
3
CS1
I
Current sense input for cycle-by-
cycle limiting
If CS1 exceeds 0.5 V the outputs goes into Cycle-
by-Cycle current limit. CS1 is held low for 50 ns
after OUT_A switches high providing leading edge
blanking.
4
CS2
I
Current sense input for soft restart
If CS2 exceeds 0.5 V, the outputs will be disabled
and a soft start commenced. The soft-start
capacitor will be fully discharged and then released
with a pullup current of 1 µA. After the first output
pulse (when SS =1 V), the SS charge current will
revert back to 20 µA.
5
TIME
I
Output overlap and dead-time
control
An external resistor (RSET) sets either the overlap
time or dead time for the active clamp output. An
RSET resistor connected between TIME and GND
produces in-phase OUT_A and OUT_B pulses with
overlap. An RSET resistor connected between TIME
and REF produces out-of-phase OUT_A and
OUT_B pulses with dead time.
6
REF
O
Precision 5-V reference output
Maximum output current: 10-mA locally decouple
with a 0.1-µF capacitor. Reference stays low until
the VCC UV comparator is satisfied.
7
VCC
P
Output from the internal high
voltage start-up regulator. The VCC
voltage is regulated to 7.6 V.
If an auxiliary winding raises the voltage on this pin
above the regulation setpoint, the internal start-up
regulator shuts down, reducing the IC power
dissipation.
8
OUT_A
O
Main output driver
Output of the main switch PWM output gate driver.
Output capability of 3-A peak sink current.



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