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LM2743MTC/NOPB Datasheet(PDF) 22 Page - Texas Instruments |
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LM2743MTC/NOPB Datasheet(HTML) 22 Page - Texas Instruments |
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22 / 44 page ![]() 22 LM2743 SNVS276I – APRIL 2004 – REVISED FEBRUARY 2019 www.ti.com Product Folder Links: LM2743 Submit Documentation Feedback Copyright © 2004–2019, Texas Instruments Incorporated Typical Applications (continued) In this example, in order to maintain a 2% peak-to-peak output voltage ripple and a 40% peak-to-peak inductor current ripple, the required maximum ESR is 20 m Ω. The Sanyo 4SP560M electrolytic capacitor will give an equivalent ESR of 14 m Ω. The capacitance of 560 µF is enough to supply energy even to meet severe load transient demands. 8.2.1.2.6 MOSFETs Selection of the power MOSFETs is governed by a tradeoff between cost, size, and efficiency. One method is to determine the maximum cost that can be endured, and then select the most efficient device that fits that price. Breaking down the losses in the high-side and low-side MOSFETs and then creating spreadsheets is one way to determine relative efficiencies between different MOSFETs. Good correlation between the prediction and the bench result is not specified, however. Single-channel buck regulators that use a controller IC and discrete MOSFETs tend to be most efficient for output currents of 2A to 10A. Losses in the high-side MOSFET can be broken down into conduction loss, gate charging loss, and switching loss. Conduction loss, or I2R loss, is approximately: PC = D ((IO) 2 x R DSON-HI x 1.3) (High-Side MOSFET) (26) PC = (1 - D) x ((IO) 2 x R DSON-LO x 1.3) (Low-Side MOSFET) (27) In the above equations, the factor 1.3 accounts for the increase in MOSFET RDSON due to heating. Alternatively, the 1.3 can be ignored and the RDSON of the MOSFET estimated using the RDSON Vs. Temperature curves in the MOSFET datasheets. Gate charging loss results from the current driving the gate capacitance of the power MOSFETs, and is approximated as: PGC = n x (VDD) x QG x fSW (28) where ‘n’ is the number of MOSFETs (if multiple devices have been placed in parallel), VDD is the driving voltage (see MOSFET Gate Drivers section) and QGS is the gate charge of the MOSFET. If different types of MOSFETs are used, the n term can be ignored and their gate charges simply summed to form a cumulative QG. Gate charge loss differs from conduction and switching losses in that the actual dissipation occurs in the LM2743, and not in the MOSFET itself. Switching loss occurs during the brief transition period as the high-side MOSFET turns on and off, during which both current and voltage are present in the channel of the MOSFET. It can be approximated as: PSW = 0.5 x VIN x IO x (tr + tf) x fSW (29) where tR and tF are the rise and fall times of the MOSFET. Switching loss occurs in the high-side MOSFET only. For this example, the maximum drain-to-source voltage applied to either MOSFET is 3.6V. The maximum drive voltage at the gate of the high-side MOSFET is 3.1V, and the maximum drive voltage for the low-side MOSFET is 3.3V. Due to the low drive voltages in this example, a MOSFET that turns on fully with 3.1V of gate drive is needed. For designs of 5A and under, dual MOSFETs in SOIC-8 package provide a good trade-off between size, cost, and efficiency. 8.2.1.2.7 Support Components CIN2 - A small value (0.1-µF to 1-µF) ceramic capacitor should be placed as close as possible to the drain of the high-side MOSFET and source of the low-side MOSFET (dual MOSFETs make this easy). This capacitor should be X5R type dielectric or better. RCC, CCC- These are standard filter components designed to ensure smooth DC voltage for the chip supply. RCC should be 1 Ω to 10 Ω. CCC should 1 µF, X5R type or better. CBOOT- Bootstrap capacitor, typically 100 nF. RPULL-UP – This is a standard pull-up resistor for the open-drain power good signal (PWGD). The recommended value is 10 k Ω connected to VCC. If this feature is not necessary, the resistor can be omitted. |
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