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AFE5804 Datasheet(PDF) 15 Page - Texas Instruments |
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AFE5804 Datasheet(HTML) 15 Page - Texas Instruments |
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15 / 82 page  15 ADS5294 www.ti.com SLAS776E – NOVEMBER 2011 – REVISED APRIL 2018 Product Folder Links: ADS5294 Submit Documentation Feedback Copyright © 2011–2018, Texas Instruments Incorporated 8.10 Serial Interface Timing Requirements The table shows typical values at 25°C. MIN and MAX values are across the full temperature range TMIN = –40°C to TMAX = 85°C, AVDD = 1.8 V, LVDD = 1.8 V, unless otherwise noted. MIN TYP MAX UNIT fSCLK SCLK frequency (= 1 / tSCLK) > DC 15 MHz tSLOADS CS to SCLK set-up time 33 ns tSLOADH SCLK to CS hold time 33 ns tDS SDATA set-up time 33 ns tDH SDATA hold time 33 ns 8.11 Reset Timing The table shows typical values at 25°C. MIN and MAX values are across the full temperature range TMIN = –40°C to TMAX = 85°C (unless otherwise noted). See Figure 1 MIN TYP MAX UNIT t1 Power-on delay Delay from power up of AVDD and LVDD to RESET pulse active 1 ms t2 Reset pulse duration Pulse duration of active RESET signal 50 ns t3 Register write delay Delay from RESET disable to CSZ active 100 ns |
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