MB85R8M2TA datasheet(4/30 Pages) RAMXEED

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DS501-00070-2v1-E

MB85R8M2TA



PIN DESCRIPTIONS

Pin Number(FBGA)

Pin Number(TSOP) Pin Name

Functional Description

A3, A4, A5, B3, B4, C3,

C4, D4, H2, H3, H4, H5,

G3, G4, F3, F4, E4, D3,

5 to 1, 44 to 42,

28 to 23, 22 to 18

A0 to A18

Address Input pins

Select 524,288 words in FeRAM

memory array by 19 Address Input

pins. When these address inputs are

changed during /CE equals to “L”

level, reading operation of data

selected in the address after transition

will start.

B6, C5, C6, D5, E5, F5,

F6, G6, B1, C1, C2, D2

E2, F2, F1, G1

7 to 10, 13 to 16,

29 to 32, 35 to 38

I/O0 to

I/O15

Data Input/Output pins

These are 16 bits bidirectional pins for

reading and writing.

/CE

Chip Enable Input pin

In case the /CE equals to “L” level and

/ZZ equals to “H” level, device is

activated and enables to start memory

access.

In writing operation, input data from I/O

pins are latched at the rising edge of /CE

and written to FeRAM memory array.

/WE

Write Enable Input pin

Writing operation starts at the falling

edge of /WE.

Input data from I/O pins are latched at

the rising edge of /WE and written to

FeRAM memory array.

/OE

Output Enable Input pin

When the /OE is “L” level, valid data

are output to data bus.

When the /OE is “H” level, all I/O pins

become high impedance (High-Z)

state.

―

/ZZ

Sleep Mode Input pin

When the /ZZ becomes to “L” level,

device transits to the Sleep Mode.

During reading and writing operation,

/ZZ pin shall be hold “H” level.

A1, B2

40, 39

/UB, /LB

Lower/Upper byte Control Input pins

In case /LB or /UB equals to “L” level,

it enables reading/writing operation of

I/O0 to I/O7 or I/O8 to I/O15

respectively. In case /LB and /UB

equal to “H” level, all I/O pins become

High-Z state.

D6, E1

11, 33

VDD

Supply Voltage pins

Connect all two pins to the power

supply.

D1, E6

12, 34

VSS

Ground pins

Connect all two pins to ground.

E3, G2, H6

No connected pin

Left open or connect to VDD/VSS.

Note: Please refer to the timing diagram for functional description of each pin.

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