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STA369BW Datasheet(PDF) 71 Page - STMicroelectronics |
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STA369BW Datasheet(HTML) 71 Page - STMicroelectronics |
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71 / 89 page  DocID022033 Rev 2 71/89 STA369BW Register description 89 8.15 Fault-detect recovery constant registers (addr 0x2B - 0x2C) The FDRC bits specify the 16-bit fault-detect recovery time delay. When FAULT is asserted, the TRISTATE output is immediately asserted low and held low for the time period specified by this constant. A constant value of 0x0001 in this register is approximately 0.083 ms. The default value of 0x000C gives approximately 0.1 ms. 8.16 Device status register (addr 0x2D) This read-only register provides fault and thermal-warning status information from the power control block. Logic value 1 for faults or warning means normal state. Logic 0 means a fault or warning detected on the power bridge. PLLUL = 1 means that the PLL is not locked. D7 D6 D5 D4 D3 D2 D1 D0 FDRC15 FDRC14 FDRC13 FDRC12 FDRC11 FDRC10 FDRC9 FDRC8 00 00 00 0 0 D7 D6 D5 D4 D3 D2 D1 D0 FDRC7 FDRC6 FDRC5 FDRC4 FDRC3 FDRC2 FDRC1 FDRC0 00 00 11 0 0 D7 D6 D5 D4 D3 D2 D1 D0 PLLUL FAULT UVFAULT OVFAULT OCFAULT OCWARN TFAULT TWARN Table 73. Status register bits Bit R/W RST Name Description 7 R - PLLUL 0: PLL locked 1: PLL not locked 6R - FAULT 0: fault detected on power bridge 1: normal operation 5 R - UVFAULT 0: VCCxX internally detected < undervoltage threshold 4 R - OVFAULT 0: VCCxX internally detected > overvoltage threshold 3 R - OCFAULT 0: overcurrent fault detected 2 R - OCWARN 0: overcurrent warning 1R - TFAULT 0: thermal fault, junction temperature over limit detection 0R - TWARN 0: thermal warning, junction temperature is close to the fault condition |
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