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L9300 Datasheet(PDF) 143 Page - STMicroelectronics |
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L9300 Datasheet(HTML) 143 Page - STMicroelectronics |
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143 / 178 page ![]() CTRLCFG CTRLCFG 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 R RW RW RW Address: Channel_X_BaseAddress + 0x05 Type: RW Reset: 0b0000 0000 0000 0000 0000 Description: Register store current setpoint code (HW mode current control). [19:13] unused [12] Solenoid Diag Self Test: 0: Self Test disabled 1: Self Test enabled Reset events: VB_UV , GND_LOSS, POR, RES1 [11] HW feedback Frequency Mode 0: fixed 1: variable Reset events: VB_UV , GND_LOSS, POR, RES1 [10:0] Target PWM period code see Hardware current control Reset events: VB_UV, GND_LOSS, POR, RES1 L9300 SPI interface and register mapping DS12258 - Rev 5 page 143/178 |
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