VNF1248F datasheet(58/79 Pages) STMICROELECTRONICS

58 / 79 page

Bit

Default

Name

Description

Access

12 ÷ 3 0000000000

S_T_VDS

Difference between 10-bit ADC conversion of the VDS, performed

during VDS self-test and content of the VDS register latched during

self-test execution.

R/C

2 ÷ 1

S_T_VDS_STATUS

Status of VDS self-test

00: IDLE: Self-test not started

01: RUN: Self-test execution in progress

10: END: Self-test completed successfully (consistent data available on

dedicated registers)

11: ABORT: Self-test aborted (watchdog timeout, HWLO, S_T_STOP

when not required)

R/C

Parity bit

ODD parity bit check

Table 59. SR#6: status register 6; address 16h

Bit

Default

Name

Description

Access

23 ÷ 15

Unused

UPDT_S_T_STUCK

Updated status bit. This bit is set when the value is updated and

cleared when the register is read.

R/C

S_T_VDS _MAX2

This bit is set if VDS_THRS is reached during STUCK ON self-test.

R/C

12 ÷ 3 0000000000

S_T_STUCK

10-bit ADC conversion of the VDS, performed during STUCK ON

self-test

R/C

2 ÷ 1

S_T_STUCK_STATUS

Status of STUCK _ON self-test

00: IDLE: Self-test not started

01: RUN: Self-test execution in progress

10: END: Self-test completed successfully (consistent data available

on dedicated registers)

11: ABORT: Self-test aborted (watchdog timeout, HWLO,

S_T_STOP when not required)

R/C

Parity bit

ODD parity bit check

Table 60. SR#7: status register 7; address 17h

Bit

Default

Name

Description

Access

23 ÷ 15

Unused

S_T_HSC

This bit is set if HSC_THR is reached during the CURRENT SENSE

self-test.

R/C

S_T_OVC

This bit is set if OVC_THR is reached during the CURRENT SENSE

self-test.

R/C

12 ÷ 3 0000000000

S_T_CURR

Difference between 10-bit ADC conversion of the CURRENT

SENSE, performed during CURRENT SENSE self-test and content

of the HSC_SAR register latched during self-test execution.

R/C

2 ÷ 1

S_T_CURR_STATUS

Status of current sense self-test

00: IDLE: Self-test not started

01: RUN: Self-test execution in progress

10: END: Self-test completed successfully (consistent data available

on dedicated registers)

11: ABORT: Self-test aborted (watchdog timeout, HWLO, S_T_STOP

when not required)

R/C

Parity bit

ODD parity bit check

VNF1248F

SPI functional description

DS14109 - Rev 7

page 58/79

VNF1248F Datasheet(PDF) 58 Page - STMicroelectronics

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