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MP9840GL-Z Datasheet(PDF) 15 Page - Monolithic Power Systems

Part # MP9840GL-Z
Description  36V, 3.5A, Low IQ, Synchronous Step-Down Converter
PDF  27 Pages
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Manufacturer  MPS [Monolithic Power Systems]
Direct Link  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP9840GL-Z Datasheet(HTML) 15 Page - Monolithic Power Systems

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MP9840 – 36V, 3.5A, LOW IQ, SYNC STEP-DOWN CONVERTER
PIN FUNCTIONS
Pin #
QFN-16
(3mmx4mm)
Name
Description
1
PHASE
Selectable in-phase or 180° out-of-phase of SYNC input. Pull PHASE high to be
in-phase. Pull PHASE low to be 180° out-of-phase.
2
VIN
Input supply. VIN supplies power to all of the internal control circuitries and the
power switch connected to SW. Place a decoupling capacitor to ground close to VIN
to minimize switching spikes.
3, 10
SW
Switch node. SW is the output of the internal power switch.
4, 9
PGND
Power ground. PGND is the reference ground of the power device and requires
careful consideration during PCB layout. For best results, connect PGND with
copper pours and vias.
5
EN
Enable. Pull EN below the specified threshold to shut the chip down. Pull EN above
the specified threshold to enable the chip.
6
SYNC
Synchronize. Apply a 350kHz to 2.5MHz clock signal to SYNC to synchronize the
internal oscillator frequency to the external clock. The external clock should be at
least 250kHz larger than the RFREQ set frequency. SYNC can also be used to select
forced CCM or AAM. Drive SYNC high before the chip starts up to choose forced
CCM; drive SYNC low or leave SYNC floating to choose AAM.
7
PG
Power good output. The output of PG is an open drain.
8
BIAS
Bias input. Connect BIAS to an external power supply (5V
≤ V
BIAS
≤ 18V) to reduce
power dissipation and increase efficiency. If not in use, float BIAS or connect BIAS
to ground.
11
BST
Bootstrap. BST is the positive power supply for the high-side MOSFET driver
connected to SW. Connect a bypass capacitor between BST and SW.
12
VCC
Bias supply. VCC supplies power to the internal control circuit and gate drivers. A
decoupling capacitor (
≥1µF) to ground is required close to VCC.
13
AGND
Analog ground. AGND is the reference ground of the logic circuit.
14
SS
Soft-start input. Place a capacitor from SS to AGND to set the soft-start period. The
MP9840 sources 10µA from SS to the soft-start capacitor during start-up. As the SS
voltage rises, the feedback threshold voltage increases to limit inrush current during
start-up.
15
FB
Feedback input. Connect FB to the center point of the external resistor divider. The
feedback threshold voltage is 0.8V. Place the resistor divider as close to FB as
possible. Avoid placing vias on the FB traces.
16
FREQ
Switching frequency program. Connect a resistor from FREQ to ground to set the
switching frequency.
MP9840 Rev. 1.01
www.MonolithicPower.com
15
1/23/2018
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.



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