MP9840 – 36V, 3.5A, LOW IQ, SYNC STEP-DOWN CONVERTER

PCB Layout Guidelines

(6)

Efficient

PCB

layout,

is

critical

for

stable

operation, especially for the input capacitor

placement.

A

four-layer

layout

is

strongly

recommended

to

achieve

better

thermal

performance. For best results, refer to Figure 8

and follow the guidelines below.

1.

Place the symmetric input capacitors as

close to VIN and GND as possible.

2.

Use a large ground plane to connect to

PGND directly.

3.

Add vias near PGND if the bottom layer is a

ground plane.

4.

Ensure that the high-current paths at GND

and VIN have short, direct, and wide traces.

5.

Place

the

ceramic

input

capacitors,

especially the small package size (0603)

input bypass capacitor, as close to VIN and

PGND

as

possible

to

minimize

high-

frequency noise.

6.

Keep the connection of the input capacitor

and VIN as short and wide as possible.

7.

Place the VCC capacitor as close to VCC

and GND as possible.

8.

Route SW and BST away from sensitive

analog areas such as FB.

9.

Place the feedback resistors close to the

chip to ensure that the trace connecting to

FB is as short as possible.

10. Use multiple vias to connect the power

planes to the internal layers.

NOTE:

6) The recommended PCB layout is based on Figure 9.

Top Layer

Inner Layer 1

Inner Layer 2

Bottom Layer

Figure 8: Recommended PCB Layout

MP9840 Rev. 1.01

www.MonolithicPower.com

23

1/23/2018

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