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MSP430FR2000IRLL Datasheet(PDF) 21 Page - Texas Instruments

Part # MSP430FR2000IRLL
Description  MSP430FR21xx, MSP430FR2000 Mixed-Signal Microcontrollers
PDF  85 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
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MSP430FR2000IRLL Datasheet(HTML) 21 Page - Texas Instruments

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8.12.3 Clock Specifications
8.12.3.1 XT1 Crystal Oscillator (Low Frequency)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(1) (2)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX UNIT
fXT1, LF
XT1 oscillator crystal, low
frequency
LFXTBYPASS = 0
32768
Hz
DCXT1, LF
XT1 oscillator LF duty cycle
Measured at MCLK,
fLFXT = 32768 Hz
30%
70%
fXT1,SW
XT1 oscillator logic-level square-
wave input frequency
LFXTBYPASS = 1 (3) (4)
32768
Hz
DCXT1, SW
LFXT oscillator logic-level
square-wave input duty cycle
LFXTBYPASS = 1
40%
60%
OALFXT
Oscillation allowance for
LF crystals (5)
LFXTBYPASS = 0, LFXTDRIVE = {3},
fLFXT = 32768 Hz, CL,eff = 12.5 pF
200
kΩ
CL,eff
Integrated effective load
capacitance (6)
See (7)
1
pF
tSTART,LFXT Start-up time (9)
fOSC = 32768 Hz
LFXTBYPASS = 0, LFXTDRIVE = {3},
TA = 25°C, CL,eff = 12.5 pF
1000
ms
fFault,LFXT
Oscillator fault frequency (10)
XTS = 0(8)
0
3500
Hz
(1)
To improve EMI on the LFXT oscillator, observe the following guidelines:
•
Keep the trace between the device and the crystal as short as possible.
•
Design a good ground plane around the oscillator pins.
•
Prevent crosstalk from other clock or data lines into oscillator pins XIN and XOUT.
•
Avoid running PCB traces underneath or adjacent to the XIN and XOUT pins.
•
Use assembly materials and processes that avoid any parasitic load on the oscillator XIN and XOUT pins.
•
If conformal coating is used, make sure that it does not induce capacitive or resistive leakage between the oscillator pins.
(2)
See MSP430 32-kHz Crystal Oscillators for details on crystal section, layout, and testing.
(3)
When LFXTBYPASS is set, LFXT circuits are automatically powered down. The input signal is a digital square wave with parametrics
defined in Section 8.12.4.1. Duty cycle requirements are defined by DCLFXT, SW.
(4)
Maximum frequency of operation of the entire device cannot be exceeded.
(5)
Oscillation allowance is based on a safety factor of 5 for recommended crystals. The oscillation allowance is a function of the
LFXTDRIVE settings and the effective load. In general, comparable oscillator allowance can be achieved based on the following
guidelines, but should be evaluated based on the actual crystal selected for the application:
•
For LFXTDRIVE = {0}, CL,eff = 3.7 pF
•
For LFXTDRIVE = {1}, 6 pF ≤ CL,eff ≤ 9 pF
•
For LFXTDRIVE = {2}, 6 pF ≤ CL,eff ≤ 10 pF
•
For LFXTDRIVE = {3}, 6 pF ≤ CL,eff ≤ 12 pF
(6)
Includes parasitic bond and package capacitance (approximately 2 pF per pin).
(7)
Requires external capacitors at both terminals to meet the effective load capacitance specified by crystal manufacturers.
Recommended effective load capacitance values supported are 3.7 pF, 6 pF, 9 pF, and 12.5 pF. Maximum shunt capacitance of
1.6 pF. The PCB adds additional capacitance, so it must also be considered in the overall capacitance. Verify that the recommended
effective load capacitance of the selected crystal is met.
(8)
Measured with logic-level input frequency but also applies to operation with crystals.
(9)
Includes start-up counter of 1024 clock cycles.
(10) Frequencies above the MAX specification do not set the fault flag. Frequencies between the MIN and MAX specifications may set the
flag. A static condition or stuck at fault condition sets the flag.
www.ti.com
MSP430FR2111, MSP430FR2110, MSP430FR2100, MSP430FR2000
SLASE78E – AUGUST 2016 – REVISED JUNE 2021
Copyright © 2021 Texas Instruments Incorporated
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Product Folder Links: MSP430FR2111 MSP430FR2110 MSP430FR2100 MSP430FR2000



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