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L99DZ80EP Datasheet(PDF) 55 Page - STMicroelectronics |
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L99DZ80EP Datasheet(HTML) 55 Page - STMicroelectronics |
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55 / 68 page ![]() DocID18260 Rev 6 55/68 L99DZ80EP SPI - control and status registers 67 5.8 Configuration Register 5.9 Status Register 0 Table 40. Configuration Register Bit Name Access Reset Content 15 0 0 Reserved (must be set to ‘0’) 14 0 0 13 0 0 12 0 0 11 0 0 10 0 0 90 0 80 0 70 0 6 HEN Read/write 0 A ‘1’ enables the H-bridge 5 MASK OL HS1 Read/write 0 Masks open-load of high-side 1 to global status register 4 MASK OL LS1 Read/write 0 Masks open-load of low-side 1 to global status register 3 MASK TW Read/write 0 Masks thermo warning to global status register 2 MASK EC OL Read/write 0 Masks open-load of ECV, ECFDHS, ECFDLS and OUT10 1 MASK OL Read/write 0 Masks all open-load diagnosis to global status register 0 WD Read/write 0 Watchdog Table 41. Status Register 0 Bit Name Access Content 15 OUT1_HS OC Read/clear Overcurrent status bit of the corresponding output driver. A ‘1’ indicates that an overcurrent has occurred. 14 OUT1_LS OC Read/clear 13 OUT2_HS OC Read/clear 12 OUT2_LS OC Read/clear 11 OUT3_HS OC Read/clear 10 OUT3_LS OC Read/clear 9 OUT4_HS OC Read/clear 8 OUT4_LS OC Read/clear 7 OUT5_HS OC Read/clear 6 OUT5_LS OC Read/clear 5 OUT6_HS OC Read/clear 4 OUT6_LS OC Read/clear |
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