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TLV9101 Datasheet(PDF) 2 Page - Texas Instruments

Part # TLV9101
Description  TLV910x 16-V, 1-MHz, Rail-to-Rail Input/Output, Low Power Op Amp
PDF  91 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TLV9101 Datasheet(HTML) 2 Page - Texas Instruments

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Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................4
6 Specifications................................................................ 10
6.1 Absolute Maximum Ratings ..................................... 10
6.2 ESD Ratings ............................................................ 10
6.3 Recommended Operating Conditions ......................10
6.4 Thermal Information for Single Channel .................. 10
6.5 Thermal Information for Dual Channel ..................... 11
6.6 Thermal Information for Quad Channel ....................11
6.7 Electrical Characteristics ..........................................12
6.8 Typical Characteristics.............................................. 15
7 Detailed Description......................................................23
7.1 Overview................................................................... 23
7.2 Functional Block Diagram......................................... 23
7.3 Feature Description...................................................24
7.4 Device Functional Modes..........................................31
8 Application and Implementation ................................. 32
8.1 Application Information............................................. 32
8.2 Typical Applications.................................................. 32
9 Power Supply Recommendations................................34
10 Layout...........................................................................34
10.1 Layout Guidelines................................................... 34
10.2 Layout Example...................................................... 34
11 Device and Documentation Support..........................37
11.1 Device Support........................................................37
11.2 Documentation Support.......................................... 37
11.3 Receiving Notification of Documentation Updates.. 37
11.4 Support Resources................................................. 37
11.5 Trademarks............................................................. 37
11.6 Electrostatic Discharge Caution.............................. 37
11.7 Glossary.................................................................. 37
12 Mechanical, Packaging, and Orderable
Information.................................................................... 38
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (June 2021) to Revision E (August 2021)
Page
• Removed preview notation from TLV9102 VSSOP (8) package from Device Information table........................ 1
• Removed preview notation from TLV9102 VSSOP-8 (DGK) package in the Pin Configuration and Functions
section................................................................................................................................................................ 4
• Removed preview note and added thermal data for VSSOP-8 (DGK) package in Thermal Information for Dual
Channel. ...........................................................................................................................................................11
• Added clarifying statement regarding logic low signal for SHDN pin in the Shutdown section ........................30
• Corrected statement on shutdown enable and disable times in the Shutdown section from 30 μs and 3 μs to
11 μs and 2.5 μs, respectively, to match the Electrical Characteristics section................................................ 30
Changes from Revision C (May 2020) to Revision D (June 2021)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document..................1
• Removed preview notation from TLV9104 SOIC (14) package from Device Information table..........................1
• Removed preview notation from TLV9104 TSSOP (14) package from Device Information table...................... 1
• Removed preview notation from TLV9102 SOT-23 (8) package from Device Information table........................ 1
• Removed preview notation from TLV9104 WQFN (16) package from Device Information table........................1
• Removed preview notation from TLV9101 DBV package (SOT-23) in the Pin Configuration and Functions
section................................................................................................................................................................ 4
• Adjusted DRL pinout in the Pin Configuration and Functions section................................................................ 4
• Removed preview notation from TLV9101 DCK package (SC70) in the Pin Configuration and Functions
section................................................................................................................................................................ 4
• Removed preview notation from TLV9101S DBV package (SOT-23) in the Pin Configuration and Functions
section................................................................................................................................................................ 4
• Clarified shutdown notation in the Pin Configuration and Functions section...................................................... 4
• Removed preview notation from TLV9102 DDF package (SOT-23-8) in the Pin Configuration and Functions
section................................................................................................................................................................ 4
• Removed preview notation from TLV9104 SOIC (D) and TSSOP (PW) packages in the Pin Configuration and
Functions section................................................................................................................................................4
• Removed preview notation from TLV9104 X2QFN (RUC) package in the Pin Configuration and Functions
section................................................................................................................................................................ 4
TLV9101, TLV9102, TLV9104
SBOS943E – FEBRUARY 2019 – REVISED AUGUST 2021
www.ti.com
2
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Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLV9101 TLV9102 TLV9104



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