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ADA4356ABCZ Datasheet(PDF) 51 Page - Analog Devices

Part # ADA4356ABCZ
Description  Programmable Transimpedance, Current to Bits Receiver μModule
PDF  61 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADA4356ABCZ Datasheet(HTML) 51 Page - Analog Devices

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Data Sheet
ADA4356
analog.com
Rev. 0
51 of 61
MEMORY MAP
Overview
The memory map register Table 18 describes the ADA4356 registers. These registers configure and control the ADC
only.
The memory map is divided into three sections: the chip configuration registers, the device index register, and the
global ADC function registers, including setup and control.
Each register has 8-bit locations. The column with the Bit 7 (MSB) heading contains the most significant bit of the
default hexadecimal value given. For example, Register 0x05, the device index register, has a hexadecimal default
value of 0x33, which means that in Register 0x05, Bits[7:6] = 00, Bits[5:4] = 11, Bits[3:2] = 00, and Bits [1:0] = 11 (in
binary).
For more details on this SPI port function, see the Application Note AN-877: Interfacing to High Speed ADCs via SPI.
This application note documents the functions controlled by Register 0x00 to Register 0xFF.
Open Locations
In Table 18, the register bit open locations are reserved to the ADA4356. These bits must be always set to 0.
Default Values
The default values are available in Table 18.
After power-on, all registers have loaded their default values. To soft reset the ADA4356, use Register 0x00. All
registers, except the read-only register (Register 0x02), are loaded with default values.
Logic Levels
An explanation of logic level terminology follows:
Bit is set is synonymous with bit is set to Logic 1 or writing Logic 1 for the bit.
“Clear a bit is synonymous with bit is set to Logic 0 or writing Logic 0 for the bit.
Memory Map Register Table
The ADA4356 uses a 3-wire interface and 16-bit addressing. Therefore, Bit 0 and Bit 7 in Register 0x00 are set to 0, and
Bit 3 and Bit 4 are set to 1.
When Bit 5 in Register 0x00 is set high, the SPI enters a soft reset, where all the user registers revert to their default
values, and Bit 2 is automatically cleared.
Table 18.Memory Map Register
REG.
(HEX)
REGISTER
NAME
BIT 7
(MSB)
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
(LSB)
DEFAULT
VALUE
(HEX)
COMMENTS
CHIP CONFIGURATION REGISTERS
0x00
SPI port
configuration
0 =
SDO
active
LSB
first
Soft
reset
1 = 16-
bit
address
1 = 16-bit
address
Soft
reset
LSB
first
0 = SDO
active
0x18
Nibbles are
mirrored to
allow a
given
register
value to
perform the
same
function for
either MSB-



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