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TS3USB30EDGSR.B Datasheet(PDF) 1 Page - Texas Instruments |
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TS3USB30EDGSR.B Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 28 page ![]() TS3USB30E ESD-Protected, High-Speed USB 2.0 (480Mbps) 1:2 Multiplexer/Demultiplexer Switch With Single Enable 1 Features • VCC operation at 2.7V to 4.3V • D+/D– pins tolerate up to 5.25V • 1.8V compatible control-pin inputs • IOFF supports partial power-down-mode operation • RON = 10Ω maximum • ΔRON = 0.35Ω typical • Cio(ON) = 7.5pF typical • Low power consumption (70nA maximum) • –3dB bandwidth = 1400MHz typical • Latch-up performance exceeds 100mA per JESD 78, Class II 1 • ESD performance tested per JESD 22 – 8000V human-body model (A114-B, Class II) – 1000V charged-device model (C101) • ESD performance I/O port to GND 2 – 15000V human-body model • Packaged in 10-pin UQFN (1.8mm × 1.4mm) 2 Applications • Routes Signals for USB 1.0, 1.1, and 2.0 • Multi-Purpose Signal Switching • Portable Electronics • Industrial • Consumer Products 3 Description The TS3USB30E is a high-bandwidth 1:2 switch specially designed for the switching of high-speed USB 2.0 signals in handset and consumer applications, such as cell phones, digital cameras, and notebooks with hubs or controllers with limited USB I/Os. The wide bandwidth (1400MHz) of this switch allows signals to pass with minimum edge and phase distortion. The device multiplexes differential outputs from a USB host device to one of two corresponding outputs, or from two different hosts to one corresponding output. The switch is bidirectional and offers little or no attenuation of the high-speed signals at the outputs. The TS3USB30E is designed for low bit-to-bit skew and high channel-to-channel noise isolation, and is compatible with various standards, such as high-speed USB 2.0 (480Mbps). The TS3USB30E integrates ESD protection cells on all pins, is available in a tiny UQFN package (1.8mm × 1.4mm) or a VSSOP package, and is characterized over the free-air temperature range of –40°C to 85°C. Package Information PART NUMBER PACKAGE(1) PACKAGE SIZE(2) TS3USB30E DGS (VSSOP, 10) 3mm × 4.9mm RSW (UQFN, 10) 1.8mm × 1.4mm (1) For all available packages, see Section 11. (2) The package size (length × width) is a nominal value and includes pins, where applicable. D1+ D1– D2+ D2– Control D+ D– S OE Functional Block Diagram 1 Except OE and S inputs 2 High-voltage HBM is performed in addition to the standard HBM testing (A114-B, Class II) and applies to I/O ports tested with respect to GND only. TS3USB30E SCDS255G – DECEMBER 2008 – REVISED OCTOBER 2024 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. |
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