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L6223 Datasheet(PDF) 19 Page - STMicroelectronics

Part # L6223
Description  DMOS PROGRAMMABLE HIGH SPEED UNIPOLAR STEPPER MOTOR DRIVER
PDF  33 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L6223 Datasheet(HTML) 19 Page - STMicroelectronics

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2) Back EMF (BEMF) equal to 80% of its peak
during the phase change and equal to 50% of its
peak during the chopping period.
3) Constant slope of the current during tON,tOFF
and for power calculation during the phase
change (See t1 in Fig. 27).
4) Current imbalance supposed to be zero.
5) Current ripple during the chopping neglegible.
As was previously stated, the current chopping is
obtained by means of one PWM Loop that con-
trols the charge time tON of the inductance of the
windings, A and B for example in fig.22.
This time starts each clock pulse and stops when
Q5 is switched OFF because of the condition:
Vref =2 RSIp.
A factor 2 is required because the single sensing
resistor RS is crossed by the peak current Ip flow-
ing through each of the two energized windings
(A of MA; B of MB).
This configuration can produce an imbalance be-
tween the two peak currents because at the
phase change the BEMF of one winding (MA) can
be out of phase with respect to the BEMF of the
other one (MB); in addition, an imbalance may
also occur at the phase change when the Power
Supply Voltage selected is too low and/or when
one motor is driven with too large Lm/Rm ratio.
Nevertheless in most of the applications the dissi-
pated power is not increased and there is no sig-
nificant change in torque.
During tON the current Ip, flowing through the
phase A (seg. Fig. 24), is defined by VON
VON
≅ VS -Rtot Ip - BEMF
where Rtot =RS +Rm +RDSON tot
in which Rm is the winding resistance of the
phase A and RDSON tot is the sum of the RDSON of
Q1 and Q5: Rm and BEMF are not shown on the
Figure 24.
At the end of tON, the current starts its slow decay
and jumps to Ip/2 (see Fig. 25) since the total in-
ductance becomes four times Lm (perfect cou-
pling) that is the inductance of the phase A alone.
The recirculation time tOFF is defined by:
VOFF
≅ 2BEMF + IP (Rm +RDSONQ1)
since RDSONQ1 =RDSONOQ2.
The current through Q1 is shown in Fig. 26: the
current ripple is on lp and IP/2 during tON and tOFF
respectively. It can be obtained the Duty Cycle:
DC = VOFF / (2VON +VOFF)
since 2VON tON =VOFF tOFF
The slow decay allows a small current ripple as
earlier It is considered equal to zero. The current
through the phases A and B can be seen in Fig.
27 where the InA and InB signals (see Fig. 22)
are shown as well.
These two signals are 90
° out of phase with each
other and they are 180
° out of phase with the cor-
responding inputs of the IC. In A and In B are not
shown in the Figure.
During the time Tp the motor goes through four
steps and the rotation speed Vrot (step/sec) can
be given by:
Vrot = 4/Tp.
By considering what was stated above, the follow-
ing can be applied:
1) Dissipated power by the 4 sink power DMOS
(Q1 to Q4).
PdL
≅ 4RDSONQ1 Ip
2
TP
T1
3
+ 
Tp
2
+ T
1
1
+ DC
2
2) Dissipated power by Q5 (PdH).
PdH
≅ 4RDSONQ5Ip2
DC
+ T1
Tp
4
3
− 4DC
where the phase change duration is:
T1
=
− Lm
Rtot
loge
1
−
2Rtot Ip
Vs
− 1.6 BEMF + Rtot IP
The chopping produces little power dissipation.
It’s value can be approximated by:
3) Pdch
≅ 8 ⋅ 10-3 Vs Ip
The sum of 1) + 2) + 3) gives the dissipated
power of the output stage. To obtain the total
amount of dissipated power it’s necessary to in-
clude the power dissipation produced by the qui-
escent currents IS (from the power stage) and ISS
(from the Logical circuits):
Pdo =VS IS +VSS ISS,
considering IS constat versus VS. Finally:
Ptot = PdL + PdH + Pdch + Pdo
Example
Supply Voltage
VS = 36V
Logic Voltage
VSS =5V
Peak current (per phase)Ip = 0.7A
Motor resistance
Rm =9
Ω
Motor inductance
Lm = 6mH
at Tamb =50
°C
Rotation speed
Vrot = 500 step/sec (const)
Peak of the BEMF
BEMF = 1 Vp
Max ambient temperature Tamb =50
°C
Max junction temperature Tj = 125
°C
From the Electrical Characteristics of the L6223
(Typical value):
Internal Reference Voltage Vref = 0.5V
Sink DMOS RDSON
RDSON L = 1.2
Ω
at
Source DMOS RDSON RDSON H = 0.7
Ω Tj= 25°C
Power Supply Current
IS = 4 mA
Worst
Logic Supply Current
ISS = 20 mA
Case
From Fig. 3 (see pag. 6) the following is obtained:
α ≅ 1.65 at Tj = 125°C.
The DMOS ON-Resistances become (worst case):
L6223
19/33



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