MPF0900AMBA2ES datasheet(205/205 Pages) NXP

205 / 205 page

NXP Semiconductors

PF09

Nine-channel power management IC with advanced system safety monitoring

13.2.1.1 Always-on mode .............................................. 91

13.2.1.2 System regulator mode ................................... 92

13.2.1.3 Electrical characteristics .................................. 92

13.2.2

SW1 (3.5 A peak/valley current mode buck

regulator) ..........................................................93

13.2.2.1 3.3 V load switch operation ............................. 96

13.2.2.2 Electrical characteristics .................................. 98

13.2.3

SW2 - SW5 (2.5 A peak/valley current

mode buck regulator) .....................................101

13.2.3.1 Multiphase operation ..................................... 105

13.2.3.2 Electrical characteristics ................................ 106

13.2.4

LDO1 (500 mA linear regulator with load

switch mode) ................................................. 109

13.2.4.1 Load switch mode ......................................... 111

13.2.4.2 Electrical characteristics ................................ 112

13.2.5

LDO2 / LDO3 (200 mA linear regulators

with load switch mode) ..................................114

13.2.5.1 Load switch mode ......................................... 116

13.2.5.2 External VMON mode ....................................116

13.2.5.3 LDO bypass mode .........................................116

13.2.5.4 Electrical characteristics ................................ 119

13.3

Voltage monitoring .........................................121

13.3.1

System-on monitoring ....................................121

13.3.1.1 VMON during SW1 load switch operation ......125

13.3.1.2 VMON during LDOx load switch operation ... 125

13.3.2

VAON monitoring ........................................... 126

13.3.2.1 VAON as always-on regulator ........................127

13.3.2.2 VAON as system regulator ............................ 127

13.3.3

External voltage monitoring ........................... 127

13.3.3.1 VMON1 / VMON2 .......................................... 127

13.3.3.2 LDO2 / LDO3 external VMON operation ........131

13.3.4

Electrical characteristics ................................ 134

13.4

Clock management ........................................135

13.4.1

High-frequency clock ..................................... 135

13.4.1.1 Manual frequency tuning ............................... 135

13.4.1.2 Spread spectrum ........................................... 136

13.4.2

Clock synchronization ....................................138

13.4.2.1 SYNCOUT mode ........................................... 138

13.4.2.2 SYNCIN mode ............................................... 138

13.4.2.3 Electrical characteristics ................................ 139

13.5

Analog multiplexer ......................................... 140

13.5.1

Electrical characteristics ................................ 141

13.6

Thermal monitors ...........................................142

13.6.1

Electrical characteristics ................................ 144

Functional safety ......................................... 145

14.1

Output voltage monitoring ............................. 146

14.1.1

Voltage monitoring during a pin

disconnection .................................................146

14.1.1.1 Switching regulators FB disconnection .......... 146

14.1.1.2 LDO regulators output disconnection .............146

14.2

Bandgap monitoring .......................................147

14.3

Clock monitoring ............................................147

14.4

Watchdog management .................................147

14.4.1

Static WD .......................................................148

14.4.2

Dynamic WD ..................................................148

14.4.3

Servicing the watchdog timer ........................ 149

14.5

FS0B active safe-state mode ........................ 153

14.5.1

FS0B pin diagnostic bit ..................................154

14.5.2

Redundant FS0B control ............................... 154

14.6

External error monitoring (ERRMON) ............ 155

14.6.1

ERRMON dynamic characteristic .................. 156

14.7

FCCU monitoring ........................................... 157

14.7.1

FCCU full bistable operation ..........................158

14.7.2

Hybrid bistable mode .....................................159

14.7.3

Single-ended FCCU-level monitoring ............ 161

14.7.4

Single-ended FCCU PWM monitoring ........... 161

14.7.5

FCCU diagnostics ..........................................162

14.7.6

Electrical characteristics ................................ 162

14.8

ABIST .............................................................163

14.9

ABIST on demand ......................................... 164

14.10

Logic built-in self-test (LBIST) ....................... 164

14.10.1 Startup LBIST ................................................ 164

14.10.2 LBIST on demand ......................................... 165

14.11

Dynamic CRC (DCRC) .................................. 167

14.12

Digital machine supervisor .............................167

14.12.1 DMS safety coverage .................................... 169

14.12.2 DMS safety configuration .............................. 169

14.12.2.1 Safety handshake configuration registers ......170

14.12.2.2 Bandgap monitor fault protection ...................170

14.12.2.3 VDIG_OV monitor fault protection ................. 171

14.12.3 Electrical characteristics ................................ 172

PF09 register map ....................................... 173

15.1

Functional registers ....................................... 173

15.2

Functional register reset conditions ............... 180

15.3

OTP registers ................................................ 182

ESD requirements ...................................... 187

Thermal characteristics .............................. 188

Operating conditions ................................. 189

Package drawing ......................................... 190

Revision history ...........................................196

Legal information .........................................198

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section 'Legal information'.

For more information, please visit: https://www.nxp.com

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Date of release: 16 December 2025

Document identifier: PF09

MPF0900AMBA2ES Datasheet(PDF) 205 Page - NXP Semiconductors

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