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IL-P3
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Line Scan Sensors
Symbol
Description
Unit
Min.
Rec.
Max.
ILOAD
Load current to the output (OS)
mA
7.5
10.0
18.0
VDD
Amplifier supply
V
13.5
14.0
15.0
VOD
Output reset drain
V
12.0
12.5
13.0
VSET
Output node set gate
V
0.7
1.2
1.4
VSTOR
2
Pixel storage gate
V
1.1
1.5
1.7
VPR
Pixel reset drain, guard ring
V
13
14
15
VHIGH
High bias voltage
V
13
14
15
VLOW
Low bias voltage
V
-0.5
0
15
VBB
3
Substrate
V
-2.5
-2
-1.5
VLS
Light shield
V
VBB
VSS
3
Amplifier return
V
0
Notes:
1.
When deviating from the recommended biases, ensure that the new biases still meet the essential conditions on
Table 8.
2.
VSTOR may be adjusted to affect the antiblooming level. VSAT decreases by ~ 870mV for every 1.0V reduction in
VSTOR.
3.
VBB should never be forward biased with respect to VSS. To protect against damage, a Schottky diode between
VBB and VSS is recommended (see Figure 7).
Table 6. IL-P3 DC Operating Conditions
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