 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
AM62A32AMLHAAMB Datasheet(PDF) 60 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
AM62A32AMLHAAMB Datasheet(HTML) 60 Page - Texas Instruments |
|
|
60 / 247 page  Table 5-25. GPMC0 Signal Descriptions (continued) SIGNAL NAME [1] PIN TYPE [2] DESCRIPTION [3] AMB PIN [4] ANF PIN [4] GPMC0_AD8 IO GPMC Data 8 Input/Output in A/D non- multiplexed mode and additionally Address 3 Output in A/D multiplexed mode P22 P22 GPMC0_AD9 IO GPMC Data 9 Input/Output in A/D non- multiplexed mode and additionally Address 3 Output in A/D multiplexed mode R19 R19 GPMC0_AD10 IO GPMC Data 10 Input/Output in A/D non- multiplexed mode and additionally Address 11 Output in A/D multiplexed mode R20 R20 GPMC0_AD11 IO GPMC Data 11 Input/Output in A/D non- multiplexed mode and additionally Address 12 Output in A/D multiplexed mode R22 R22 GPMC0_AD12 IO GPMC Data 12 Input/Output in A/D non- multiplexed mode and additionally Address 13 Output in A/D multiplexed mode T22 T22 GPMC0_AD13 IO GPMC Data 13 Input/Output in A/D non- multiplexed mode and additionally Address 14 Output in A/D multiplexed mode R21 R21 GPMC0_AD14 IO GPMC Data 14 Input/Output in A/D non- multiplexed mode and additionally Address 15 Output in A/D multiplexed mode T20 T20 GPMC0_AD15 IO GPMC Data 15 Input/Output in A/D non- multiplexed mode and additionally Address 16 Output in A/D multiplexed mode T21 T21 GPMC0_BE0n_CLE O GPMC Lower-Byte Enable (active low) or Command Latch Enable L19 L19 GPMC0_BE1n O GPMC Upper-Byte Enable (active low) M18 M18 GPMC0_CSn0 O GPMC Chip Select 0 (active low) M19 M19 GPMC0_CSn1 O GPMC Chip Select 1 (active low) M21 M21 GPMC0_CSn2 O GPMC Chip Select 2 (active low) M22 M22 GPMC0_CSn3 O GPMC Chip Select 3 (active low) M20 M20 GPMC0_WAIT0 I GPMC External Indication of Wait R18 R18 GPMC0_WAIT1 I GPMC External Indication of Wait R17 R17 5.3.12 I2C 5.3.12.1 MAIN Domain Table 5-26. I2C0 Signal Descriptions SIGNAL NAME [1] PIN TYPE [2] DESCRIPTION [3] AMB PIN [4] ANF PIN [4] I2C0_SCL IOD I2C Clock D17 D17 I2C0_SDA IOD I2C Data E16 E16 Table 5-27. I2C1 Signal Descriptions SIGNAL NAME [1] PIN TYPE [2] DESCRIPTION [3] AMB PIN [4] ANF PIN [4] I2C1_SCL IOD I2C Clock C17 C17 I2C1_SDA IOD I2C Data E17 E17 Table 5-28. I2C2 Signal Descriptions SIGNAL NAME [1] PIN TYPE [2] DESCRIPTION [3] AMB PIN [4] ANF PIN [4] I2C2_SCL IOD I2C Clock M22 M22 I2C2_SDA IOD I2C Data M20 M20 AM62A7, AM62A7-Q1, AM62A3, AM62A3-Q1, AM62A1-Q1 SPRSP77D – MARCH 2023 – REVISED JUNE 2025 www.ti.com 60 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: AM62A7 AM62A7-Q1 AM62A3 AM62A3-Q1 AM62A1-Q1 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
