CE6313

Data Sheet

12

Intel Corporation

Figure 8 - DVB Conceptual Diagram of the Convolutional De-Interleaver Block

2.4.3.2

DSS

Before transmission, the data bytes are interleaved with each other in a cyclic pattern of thirteen. This ensures the

bytes are spaced out to avoid the possibility of a noise spike corrupting a group of consecutive message bytes.

Figure 9 below shows conceptually how the convolutional de-interleaving system works. On the CE6313, this

function is realized in the same Random Access Memory (RAM) as used for DVB, but utilizing a different

addressing algorithm.

Figure 9 - DSS Conceptual Diagram of the Convolutional De-Interleaver Block

Sync word route

17x11 bytes

17x10 bytes

17x9 bytes

17x8 bytes

17x7 bytes

17x6 bytes

17x5 bytes

17x4 bytes

17x3 bytes

17x2 bytes

17x1

0

1

2

3

4

5

6

7

8

9

10

11

0

1

2

3

4

5

6

7

8

9

10

11

One

byte per

position

1

0

145

Output

2

Input

12D

12D

12D