Table 8-2. INA151B - Typical and Maximum DC Accuracy Calculations for FSR of 4.5V (continued)

Error Source

Error Calculation for FSR=4.5V

Spec

(Typ)

Error

(PPM)

Spec

(Max)

Error

(PPM)

Total error (RSS)

VOSI2+GE2+CMRRERROR2

45.5

272.6

Table 8-3. Typical Error Budget of C2000-xxF25 ADC

Error Source

Parameter (typical)

Voltage Error for CELL1

(ppm)

Voltage Error for CELL16

(ppm)

ADC

Offset Voltage

488

488

Gain Error

688 (at 3.1V)

688 (at 3.1V)

INL

244

244

ADC Typical Error

878

878

Total Typical Error

(RSS)

902

902

Based on above error budget analysis the dominant error source is the internal ADC with a typical error value

of 878ppm more then twenty larger compared to the error of INA151 with 45ppm. Considering RSS (Root-Sum-

Squares) calculation of the errors results in a total error of 902ppm which relates to an accuracy of 0.09% of full

scale.

8.2.1.2.2 RC Filter Design Consideration

SAR ADCs use a sampling capacitor that create high-amplitude, fast-rising current transients during sampling,

which can propagate back to the driving amplifier and cause instability or noise coupling. An RC filter between

the amplifier output and ADC input isolates these kickback currents, provides a charge reservoir to supply

instantaneous current demands, and maintains amplifier stability. The filter also provides anti-aliasing protection

and bandwidth limiting to optimize signal-to-noise ratio while providing proper settling within the acquisition time

window of the ADC.

This section outlines calculations how to design the RC filter for a typical accuracy target of ±0.5LSB.

In the first step examine the sample and hold capacitor used in the chosen ADC. Given the application example

of Figure 8-2 the internal ADC of the TMS320F28002x Microcontroller deploys a sample and hold capacitor is

Csh = 7.5pF. A practical choice for the filter capacitor is:

Cfilt≥20×Csh

(1)

In this example select Cfilt = 150pF.

The second step is to determine the filter resistor, Rfilt. The sampling time constant can be approximated as the

RSS of the settling time of the amplifier (τOA) and the RC filter (τRC), thus:

τsℎ= τRC2+ τOA2

(2)

whereas:

τOA= 12π×BW151

(3)

For proper settling performance, set τRC 4 times τOA. Applying the standard RC charge equation based on TIPL

4406 yields to a RC filter constant time of:

τRC= −tacq×4

ln 0.5×FSR2N

Vdroop × 17

(4)

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INA151

SLVSIL6C – JANUARY 2026 – REVISED APRIL 2026

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