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M48T212A Datasheet(PDF) 1 Page - STMicroelectronics |
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M48T212A Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 20 page ![]() 1/20 PRELIMINARY DATA March 2000 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. M48T212A 3.3V TIMEKEEPER® CONTROLLER s CONVERTS LOW POWER SRAM into NVRAMs s YEAR 2000 COMPLIANT (4-Digit Year) s USES SUPER CAPACITOR or LITHIUM BATTERY (User Supplied) s BATTERY LOW FLAG s INTEGRATED REAL TIME CLOCK, POWER-FAIL CONTROL CIRCUIT s AUTOMATIC POWER-FAIL CHIP DESELECT and WRITE PROTECTION s WATCHDOG TIMER s WRITE PROTECT VOLTAGES (VPFD = Power-fail Deselect Voltage): – M48T212A: 2.7V ≤ VPFD ≤ 3.0V s MICROPROCESSOR POWER-ON RESET s PROGRAMMABLE ALARM OUTPUT ACTIVE in the BATTERY BACKED-UP MODE DESCRIPTION The M48T212A is a self-contained device that in- cludes a real time clock (RTC), programmable alarms, a watchdog timer, and two external chip enable outputs which provide control of up to four (two in parallel) external low-power static RAMs. A built-in 32.768 kHz oscillator (external crystal controlled) is used for the clock/calendar function. Access to all TIMEKEEPER functions and the ex- ternal RAM is the same as conventional byte-wide SRAM. The 16 TIMEKEEPER Registers offer Century, Year, Month, Date, Day, Hour, Minute, Second, Control, Calibration, Alarm, Watchdog, and Flags. Externally attached static RAMs are controlled by the M48T212A via the E1CON and E2CON signals (see Table 4). Automatic backup and write protection for an ex- ternal SRAM is provided through VOUT, E1CON and E2CON pins. (Users are urged to insure that voltage specifications, for both the controller chip and external SRAM chosen, are similar). Figure 1. Logic Diagram AI03047 4 A0-A3 A DQ0-DQ7 VCC M48T212A G VSS 8 EX E2CON E1CON W RSTIN2 RSTIN1 RST IRQ/FT VOUT WDI E VCAP X0 XI VCCSW VBAT– SOH44 (MH) 44 1 |
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