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CS5460 Datasheet(PDF) 28 Page - Cirrus Logic

Part # CS5460
Description  Single Phase Bi-Directional Power/Energy IC
PDF  34 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS5460 Datasheet(HTML) 28 Page - Cirrus Logic

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CS5460
28
DS279PP5
5.4 Voltage Reference
The CS5460 is specified for operation with a +2.5
V reference between the VREFIN and VA- pins.
The converter includes an internal 2.5 V reference
(60 ppm/°C drift) that can be used by connecting
the VREFOUT pin to the VREFIN pin of the de-
vice. If higher accuracy/stability is required, an ex-
ternal reference can be used.
5.5 Performing Calibrations
The CS5460 offers two DC calibration modes: sys-
tem offset and system gain. For system calibration
the user must supply the converter calibration sig-
nals which represent ground and full scale. The
user must provide the positive full scale point to
perform a system gain calibration and a ground
referenced signal when a system offset is per-
formed. The offset and gain signals must be within
the specified calibration limits for each specific
calibration step and channel. Since each converter
channel has its own offset and gain register asso-
ciated with it, system offset, or system gain can be
performed on either channel without the calibra-
tion results from one channel corrupting the other.
The Cycle Count register N, determines the number
of conversions averaged to obtain the calibration
results. The larger N, the higher the accuracy of the
calibration results. Once a calibration cycle is com-
plete, DRDY is set and the results are stored in ei-
ther the gain or offset register. Note that if
additional calibrations are performed, the latest cal-
ibration results will replace the effects from the
previous calibration. In any event, offset and gain
calibration steps take one cycle each to complete.
After the part is reset, the device is functional and
can perform measurements without being calibrat-
ed. The converters will utilize the initialized values
of the on-chip registers (Gain = 1.0, Offset = 0.0) to
calculate power information. Although the device
can be used without performing an offset or gain
calibration, any initial offset and gain errors in the
internal circuitry of the chip will remain.
5.5.1 System Calibration
For the system calibration functions, the user must
supply the converters calibration signals which repre-
sent ground and full scale. When a system offset cal-
ibration is performed, a ground reference signal must
be applied to the converters. Figure 12 illustrates sys-
tem offset calibration.
As shown in Figure 13, the user must input a signal
representing the positive full scale point to perform
a system gain calibration. In either case, the cali-
bration signals must be within the specified calibra-
tion limits for each specific calibration step (refer
to Full Scale DC Calibration Range).
+
-
XGAIN
+
-
External
Connections
0V
+
-
AIN+
AIN-
CM +
-
Figure 12. System Calibration of Offset.
+
-
XGAIN
+
-
External
Connections
Full Scale +
-
AIN+
AIN-
CM +
-
Figure 13. System Calibration of Gain.



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