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TMS320DM641 Datasheet(PDF) 27 Page - Texas Instruments |
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TMS320DM641 Datasheet(HTML) 27 Page - Texas Instruments |
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27 / 179 page  CPU (DSP Core) Description 27 June 2003 − Revised October 2005 SPRS222E Table 1−4. L2 Cache Registers (C64x) (Continued) HEX ADDRESS RANGE COMMENTS REGISTER NAME ACRONYM 0184 82E4 MAR185 Controls EMIFA CE3 range B900 0000 − B9FF FFFF 0184 82E8 MAR186 Controls EMIFA CE3 range BA00 0000 − BAFF FFFF 0184 82EC MAR187 Controls EMIFA CE3 range BB00 0000 − BBFF FFFF 0184 82F0 MAR188 Controls EMIFA CE3 range BC00 0000 − BCFF FFFF 0184 82F4 MAR189 Controls EMIFA CE3 range BD00 0000 − BDFF FFFF 0184 82F8 MAR190 Controls EMIFA CE3 range BE00 0000 − BEFF FFFF 0184 82FC MAR191 Controls EMIFA CE3 range BF00 0000 − BFFF FFFF 0184 8300 −0184 83FC MAR192 to MAR255 Reserved 0184 8400 −0187 FFFF − Reserved |
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