RZSLASHG2L datasheet(41/74 Pages) RENESAS

41 / 74 page

RZ/G2L Group, RZ/G2LC Group

3. Electrical Characteristics

R01DS0484EJ0110

Rev.1.10

Page 41 of 74

May 30, 2025

3.5.7.1

Ethernet-IF (Ether MII)

Table 3.33

Ethernet-IF Access Timing (Ether MII)

Item

Symbol

Min.

Max.

Unit

Figures

Ether MII

ETH_GTXTXC_TXC period

tTcyc

—

Figure 3.20

ETH_TXCTL output delay

tTENd

ETH_TXD3-0 output delay

tMTDd

ETH_RXC period

tRcyc

—

ETH_RXDV setup time

tRDVs

—

ETH_RXDV hold time

tRDVh

—

ETH_RXD3-0 setup time

tMRDs

—

ETH_RXD3-0 hold time

tMRDh

—

ETH_RXER setup time

tRERs

—

ETH_RXER hold time

tRERh

—

Note:

I/O driving ability: 8 mA

CL = 8 pF

ETn_TXD[3:0]

ETn_TX_ERR

ETn_TX_CTL/TX_EN

ETn_TXC/TX_CLK

(external clock)

Preamble

SFD

Data

CRC

tTENd

tMTDd

ETn_RXD[3:0]

ETn_RX_CTL/RX_DV

ETn_RXC/RX_CLK

(external clock)

Preamble

SFD

Data

tRDVs

CRC

tMRDs

tRDVh

ETn_RX_ERR

tRERs

tMRDh

tRERh

Figure 3.20

MII Transmission Timing

Validated with IEEE802.3 regulation.

The propagation delay for each twisted pair, measured from the MII connector to the PHY, shall not exceed 2.5 ns.

The variation in the propagation delay of the twisted pairs in a given cable bundle, measured from the MII connector to

the PHY, shall not exceed 0.1 ns.

RZ/G2L Datasheet(PDF) 41 Page - Renesas Technology Corp

RZ/G2L Datasheet(HTML) 41 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

Datasheet Download

Link URL