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RZ/G2L Datasheet(PDF) 67 Page - Renesas Technology Corp |
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RZ/G2L Datasheet(HTML) 67 Page - Renesas Technology Corp |
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67 / 74 page ![]() RZ/G2L Group, RZ/G2LC Group 3. Electrical Characteristics R01DS0484EJ0110 Rev.1.10 Page 67 of 74 May 30, 2025 3.5.21 A/D Converter Access Timing Table 3.48 A/D Converter Timing Item Symbol Min. Max. Unit Figures ADC Trigger Input Pulse Width tTRGW 1.5*2 tP1cyc* 1 Figure 3.55 Note 1. tp1cyc indicates peripheral clock means ADC_ADCLK (TSU ϕ). Note 2. When a noise filter in ADC is off. ADC_TRG tTRGW Figure 3.55 ADC Trigger Input Timing 3.5.22 Watchdog Timer Access Timing Table 3.49 Watchdog Timer Timing Item Symbol Min. Max. Unit Figures WDTOVF_PERROUT# Output Time tL 64 64 tP1cyc* 1 Figure 3.56 Note 1. tP1cyc indicates peripheral clock means WDTn_CLK (OSCCLK) (n = 0 to 2). WDTOVF_PERROUT# tL Figure 3.56 Watchdog Timer Output Timing |
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