RZSLASHG2N datasheet(101/169 Pages) RENESAS

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RZ/G Series, 2nd Generation Datasheet

Section 3. Electrical Characteristics

R01DS0483EJ0101 Rev.1.01

Page 101 of 169

Jun 30, 2025

3.15

SSI Interface

Table 3.15.1 SSI Interface Signal Timing

Conditions: VDDQ33 = 3.10 V – 3.50 V, GND = VSS = 0 V, Tc = -40 to +115 °C [RZ/G2H, RZ/G2M V1.3],

Ta = -40 to +85 °C [RZ/G2M V3.0, RZ/G2N], Tj = -40 to +115 °C [RZ/G2M V3.0, RZ/G2N]

CL = 30 pF (other than tRC: Rise-edge clock timing) [RZ/G2H, RZ/G2M V1.3, RZ/G2M V3.0, RZ/G2N]

Conditions: VDDQ33 = 3.00 V – 3.60 V, GND = VSS = 0 V, Ta = -40 to +85 °C, Tj = -40 to +115 °C,

CL = 30 pF (other than tRC: Rise-edge clock timing) [RZ/G2E]

Item

Symbol

Min.

Typ.

Max.

Unit

Note

Figures

Output clock cycle

—

15625

—

Figure 3.15.1

Input clock cycle

—

15625

—

Output clock high-cycle

tHC

—

Output clock low-cycle

tLC

—

Input clock high-cycle

tHC

—

Input clock low-cycle

tLC

—

Rise-edge clock timing

tRC

—

Output

(100pF)

Output delay

−5

—

Figure 3.15.2 to

Figure 3.15.5

—

Figure 3.15.6

Setup time

—

Figure 3.15.2 to

Figure 3.15.5

Hold time

—

Audio clock frequency

fAUDIO

3.072

—

MHz

—

Figure 3.15.7

Audio clock duty

fAUDIOduty 0.45

—

0.55

fAUDIO —

Figure 3.15.1 SCK Clock Input/output Timing

SSI_SCK

tHC

tLC

tRC

tI, tO

RZ/G2H

RZ/G2M V1.3

RZ/G2N

RZ/G2E

RZ/G2M V3.0

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