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WM8951L Datasheet(PDF) 10 Page - Wolfson Microelectronics plc |
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WM8951L Datasheet(HTML) 10 Page - Wolfson Microelectronics plc |
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10 / 42 page ![]() WM8951L Production Data w PD Rev 4.1 December 2007 10 DIGITAL AUDIO INTERFACE – MASTER MODE Figure 3 Master Mode Connection Figure 4 Digital Audio Data Timing – Master Mode Test Conditions AVDD1, AVDD2, DBDD = 3.3V, AGND = 0V, DCVDD = 1.5V, DGND = 0V, TA = +25 oC, Slave Mode, fs = 48kHz, XTI/MCLK = 256fs unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Audio Data Input Timing Information ADCLRC propagation delay from BCLK falling edge tDL 0 10 ns ADCDAT propagation delay from BCLK falling edge tDDA 0 15 ns BCLK ADCDAT ADCLRC WM8951L ADC DSP ENCODER/ DECODER BCLK (Output) ADCDAT ADCLRC (Output) t DL t DDA |
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