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DM9010
Single Chip Ethernet Controller with General Processor Interface
Preliminary
41
Version: DM9010-DS-P03
Apr. 28, 2005
8.12 (Specified config) Register – 20
Bit
Bit Name
Default
Description
20.15
TSTSE1
0,RW
Vendor test select control
20.14
TSTSE2
0,RW
Vendor test select control
20.13
FORCE_TXS
D
0,RW
Force Signal Detect
1: force SD signal OK in 100M
0: normal SD signal.
20.12
FORCE_FEF
0,RW
Vendor test select control
20.11-20
.8
Reserved
0, RO
Reserved
Read as 0, ignore on write
20.7
MDIX_CNTL
MDI/MDIX,
RO
The polarity of MDI/MDIX value
1: MDIX mode
0: MDI
mode
20.6
AutoNeg_dpb
k
0,RW
Auto-negotiation Loopback
1: test internal digital auto-negotiation Loopback
0: normal.
20.5
Mdix_fix
Value
0, RW
MDIX_CNTL force value:
When Mdix_down = 1, MDIX_CNTL value depend on the
register value.
20.4
Mdix_down
0,RW
MDIX Down
Manual force MDI/MDIX.
0: Enable auto MDI/MDIX
1: Disable auto MDI/MDIX, MDIX_CNTL value depend on
20.5
20.3
MonSel1
0,RW
Vendor monitor select
20.2
MonSel0
0,RW
Vendor monitor select
20.1
Reserved
0,RW
Reserved
Force to 0, in application.
20.0
PD_value
0,RW
Power down control value
Decision the value of each field Register 19.
1: power down
0: normal
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