ST7SCR datasheet(20/102 Pages) STMICROELECTRONICS

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ST7SCR

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6 SUPPLY, RESET AND CLOCK MANAGEMENT

6.1 CLOCK SYSTEM

6.1.1 General Description

The MCU accepts either a 4MHz crystal or an ex-

ternal clock signal to drive the internal oscillator.

The internal clock (fCPU) is derived from the inter-

nal oscillator frequency (fOSC), which is 4Mhz.

After reset, the internal clock (fCPU) is provided by

the internal oscillator (4Mhz frequency).

To activate the 48-MHz clock for the USB inter-

face, the user must turn on the PLL by setting the

PLL_ON bit in the MISCR4 register. When the PLL

is locked, the LOCK bit is set by hardware.

The user can then select an internal frequency

(fCPU) of either 4 MHz or 8MHz by programming

the CLK_SEL bit in the MISCR4 register (refer to

MISCELLANEOUS REGISTERS section on page

37).

The PLL provides a signal with a duty cycle of 50

The internal clock signal (fCPU) is also routed to

the on-chip peripherals. The CPU clock signal

consists of a square wave with a duty cycle of

50%.

Figure 10. Clock, Reset and Supply Block Diagram

The internal oscillator is designed to operate with

an AT-cut parallel resonant quartz in the frequen-

cy range specified for fosc. The circuit shown in

Figure 12 is recommended when using a crystal,

and Table 4 lists the recommended capacitance.

The crystal and associated components should be

mounted as close as possible to the input pins in

order to minimize output distortion and start-up

stabilisation time. The LOCK bit in the MISCR4

rectly from fOSC if the PLL and the USB interface

are not active.

Table 4. Recommended Values for 4 MHz

Crystal Resonator

Note: RSMAX is the equivalent serial resistor of the

crystal (see crystal specification).

PLL_

MISCR4

LOCK

4 Mhz

INTERNAL

8 Mhz

CLOCK (fCPU)

4 MHz

PLL

X 12

48 MHz

USB

48 MHz

DIV

(fOSC)

CLK_

SEL

RSMAX

Ω

COSCIN

56pF

47pF

22pF

COSCOUT

56pF

47pF

22pF

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