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ST7SCR Datasheet(PDF) 55 Page - STMicroelectronics |
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ST7SCR Datasheet(HTML) 55 Page - STMicroelectronics |
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55 / 102 page  ST7SCR 55/102 12.4 SMARTCARD INTERFACE (CRD) 12.4.1 Introduction The Smartcard Interface (CRD) provides all the re- quired signals for acting as a smartcard interface device. The interface is electrically compatible with (and certifiable to) the ISO7816, EMV, GSM and WHQL standards. Both synchronous (e.g. memory cards) and asyn- chronous smartcards (e.g. microprocessor cards) are supported. The CRD generates the required voltages to be applied to the smartcard lines. The power-off sequence is managed by the CRD. Card insertion or card removal is detected by the CRD using a card presence switch connected to the external CRDDET pin. If a card is removed, the CRD automatically deactivates the smartcard us- ing the ISO7816 deactivation sequence. An maskable interrupt is generated when a card is inserted or removed. Any malfunction is reported to the microcontroller via the Smartcard Interrupt Pending Register (CRDIPR) and Smartcard Status (CRDSR) Regis- ters. 12.4.2 Main features s Support for ISO 7816-3 standard s Character mode s 1 transmit buffer and 1 receive buffer s 4-Mhz fixed card clock s 11-bit etu (elementary time unit) counter s 9-bit guardtime counter s 24-bit general purpose waiting time counter s Parity generation and checking s Automatic character repetition on parity error detection in transmission mode s Automatic retry on parity error detection in reception mode s Card power-off deactivation sequence generation s Manual mode for driving the card I/O directly for synchronous protocols 12.4.3 Functional Description Figure 29 gives an overview of the smartcard inter- face. Figure 29. Smartcard Interface Block Diagram CLK SEL CRD CLK CRDCCR IO CRD CRD CRD RST VCC C8 CRD C4 CRD CRDIO CRDC4 CRDC8 CRDRST CRDCLK CRDDET 0 1 UART SHIFT REGISTER CRDRXB CRDTXB UART RECEIVE BUFFER UART TRANSMIT BUFFER CARD DETECTION CARD INSERTION/ CRDVCC POWER-OFF LOGIC CLOCK CONTROL UART BIT 11-BIT 4 MHz ETU COUNTER 9-BIT GUARDTIME COUNTER 24-BIT WAITING TIME COUNTER PARITY GENERATION/CHECKING COMMUNICATIONS CONTROL CRD INTERRUPT LOGIC REMOVAL INTERRUPT 1 |
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