R8C2K datasheet(286/471 Pages) RENESAS

286 / 471 page

R8C/2K Group, R8C/2L Group

16. Timers

Rev.1.10

Dec 21, 2007

Page 269 of 450

REJ09B0406-0110

Figure 16.110 Operating Example of PWM Mode

Value in TRDi register

Count source

m+1

n+1

TRDIOCi output

m-n

p+1

m-p

m-q

q+1

TRDIODi output

m: Value set in TRDGRAi register

n: Value set in TRDGRBi register

p: Value set in TRDGRCi register

q: Value set in TRDGRDi register

Inactive level “L”

Active level “H”

Inactive level “H”

Active level “L”

Set to 0 by a program

TRDIOBi output

IMFA bit in

TRDSRi register

IMFB bit in

TRDSRi register

IMFC bit in

TRDSRi register

IMFD bit in

TRDSRi register

i = 0 or 1

Set to 0 by a program

The above applies under the following conditions:

Bits BFCi and BFDi in the TRDMR register are set to 0 (registers TRDGRCi and TRDGRDi are not used as buffer registers).

Bits EBi, ECi and EDi in the TRDOER1 register are set to 0 (enable TRDIOBi, TRDIOCi and TRDIODi pin outputs).

Bits TOBi and TOCi in the TRDOCR register are set to 0 (inactive level), the TODi bit is set to 1 (active level).

The POLB bit in the TRDPOCRi register is set to 1 (active level “H”), bits POLC and POLD are set to 0 (active level “L”).

Initial output “L”

to compare match

Initial output “H”

to compare match

Initial output “L”

to compare match

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