R8C2K datasheet(287/471 Pages) RENESAS

287 / 471 page

R8C/2K Group, R8C/2L Group

16. Timers

Rev.1.10

Dec 21, 2007

Page 270 of 450

REJ09B0406-0110

Figure 16.111 Operating Example of PWM Mode (Duty 0%, Duty 100%)

Value in TRDi register

m: Value set in TRDGRAi register

Set to 0 by a program

Rewrite by a program

0000h

Duty 0%

TRDGRBi register

IMFA bit in

TRDSRi register

IMFB bit in

TRDSRi register

TSTARTi bit in

TRDSTR register

TRDIOBi output

p (p>m)

Since no compare match in the TRDGRBi register is

generated, “L” is not applied to the TRDIOBi output

Value in TRDi register

0000h

TRDGRBi register

IMFA bit in

TRDSRi register

IMFB bit in

TRDSRi register

TSTARTi bit in

TRDSTR register

TRDIOBi output

“L” is applied to TRDIOBi output at compare match

with the TRDGRBi register with no change.

i = 0 or 1

The above applies under the following conditions:

The EBi bit in the TRDOER1 register is set to 0 (enable TRDIOBi output).

The POLB bit in the TRDPOCRi register is set to 0 (active level “L”).

Rewrite by a program

Set to 0 by a program

When compare matches with registers TRDGRAi and TRDGRBi are generated

simultaneously, the compare match with the TRDGRBi register has priority.

“L” is applied to the TRDIOBi output without any change.

Duty 100%

Set to 0 by a program

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