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R8C2K Datasheet(PDF) 317 Page - Renesas Technology Corp |
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R8C2K Datasheet(HTML) 317 Page - Renesas Technology Corp |
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317 / 471 page ![]() R8C/2K Group, R8C/2L Group 16. Timers Rev.1.10 Dec 21, 2007 Page 300 of 450 REJ09B0406-0110 Figure 16.138 Registers TRDOER1 to TRDOER2 in PWM3 Mode Timer RD Output Master Enable Register 1 Symbol Address After Reset TRDOER1 013Bh FFh Bit Symbol Bit Name Function RW b3 b2 ED0 b1 b0 11 EA0 b7 b6 b5 b4 1111 EC0 RW RW EB0 RW TRDIOA0 output disable bit 0 : Enable output 1 : Disable output (The TRDIOA0 pin is used as a programmable I/O port.) TRDIOB0 output disable bit 0 : Enable output 1 : Disable output (The TRDIOB0 pin is used as a programmable I/O port.) TRDIOD0 output disable bit RW TRDIOA1 output disable bit RW RW Set these bits to 1 (programmable I/O port) in PWM3 mode. TRDIOC0 output disable bit ED1 RW EA1 EB1 RW TRDIOD1 output disable bit TRDIOB1 output disable bit EC1 TRDIOC1 output disable bit Timer RD Output Master Enable Register 2 Symbol Address After Reset TRDOER2 013Ch 01111111b Bit Symbol Bit Name Function RW INT0 _____ of pulse output forced 0 : Pulse output forced cutoff input disabled 1 : Pulse output forced cutoff input enabled (All bits in the TRDOER1 register are set to 1 (disable output) w hen “L” is applied to the INT0 _____ pin.) NOTE: 1. b3 b2 b1 b0 b7 b6 b5 b4 Refer to 16.4.4 Pulse Output Forced Cutoff. — — (b6-b0) Nothing is assigned. If necessary, set to 0. When read, the content is 1. RW PTO cutoff signal input enabled bit(1) |
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