R8C2K datasheet(328/471 Pages) RENESAS

328 / 471 page

R8C/2K Group, R8C/2L Group

16. Timers

Rev.1.10

Dec 21, 2007

Page 311 of 450

REJ09B0406-0110

16.4.12.4 Count Source Switch

• Switch the count source after the count stops.

Change procedure

(1) Set the TSTARTi (i = 0 or 1) bit in the TRDSTR register to 0 (count stops).

(2) Change bits TCK2 to TCK0 in the TRDCRi register.

• When changing the count source from fOCO40M to another source and stopping fOCO40M, wait 2 cycles

of f1 or more after setting the clock switch, and then stop fOCO40M.

Change procedure

(1) Set the TSTARTi (i = 0 or 1) bit in the TRDSTR register to 0 (count stops).

(2) Change bits TCK2 to TCK0 in the TRDCRi register.

(3) Wait 2 or more cycles of f1.

(4) Set the FRA00 bit in the FRA0 register to 0 (high-speed on-chip oscillator stops).

16.4.12.5 Input Capture Function

• Set the pulse width of the input capture signal to 3 or more cycles of the timer RD operation clock (refer to

Table 16.25 Timer RD Operation Clocks).

• The value in the TRDi register is transferred to the TRDGRji register 2 to 3 cycles of the timer RD

operation clock after the input capture signal is applied to the TRDIOji pin (i = 0 or 1, j = either A, B, C, or

D) (no digital filter).

16.4.12.6 Reset Synchronous PWM Mode

• When reset synchronous PWM mode is used for motor control, make sure OLS0 = OLS1.

• Set to reset synchronous PWM mode by the following procedure:

Change procedure

(1) Set the TSTART0 bit in the TRDSTR register to 0 (count stops).

(2) Set bits CMD1 to CMD0 in the TRDFCR register to 00b (timer mode, PWM mode, and PWM3 mode).

(3) Set bits CMD1 to CMD0 to 01b (reset synchronous PWM mode).

(4) Set the other registers associated with timer RD again.

16.4.12.7 Complementary PWM Mode

• When complementary PWM mode is used for motor control, make sure OLS0 = OLS1.

• Change bits CMD1 to CMD0 in the TRDFCR register in the following procedure.

Change procedure: When setting to complementary PWM mode (including re-set), or changing the transfer

timing from the buffer register to the general register in complementary PWM mode.

(1) Set both the TSTART0 and TSTART1 bits in the TRDSTR register to 0 (count stops).

(2) Set bits CMD1 to CMD0 in the TRDFCR register to 00b (timer mode, PWM mode, and PWM3 mode).

(3) Set bits CMD1 to CMD0 to 10b or 11b (complementary PWM mode).

(4) Set the registers associated with other timer RD again.

Change procedure: When stopping complementary PWM mode

(1) Set both the TSTART0 and TSTART1 bits in the TRDSTR register to 0 (count stops).

(2) Set bits CMD1 to CMD to 00b (timer mode, PWM mode, and PWM3 mode).

• Do not write to TRDGRA0, TRDGRB0, TRDGRA1, or TRDGRB1 register during operation.

When changing the PWM waveform, transfer the values written to registers TRDGRD0, TRDGRC1, and

TRDGRD1 to registers TRDGRB0, TRDGRA1, and TRDGRB1 using the buffer operation.

However, to write data to the TRDGRD0, TRDGRC1, or TRDGRD1 register, set bits BFD0, BFC1, and

BFD1 to 0 (general register). After this, bits BFD0, BFC1, and BFD1 may be set to 1 (buffer register).

The PWM period cannot be changed.

R8C2K Datasheet(PDF) 328 Page - Renesas Technology Corp

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