SH7261 datasheet(96/1348 Pages) RENESAS

Part #	SH7261

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

PDF	1348 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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96 / 1348 page

Section 2 CPU

Rev. 2.00 Sep. 07, 2007 Page 64 of 1312

REJ09B0320-0200

2.5

Processing States

The CPU has four processing states: reset, exception handling, program execution, and power-

down. Figure 2.6 shows the transitions between the states.

Power-on reset from any state

Manual reset from any state

Power-on reset state

Manual reset state

Program execution state

Sleep mode

Software standby mode

Exception

handling state

Exception

handling

source

occurs

Exception

handling

ends

NMI interrupt or

IRQ interrupt occurs

Power-down state

Reset canceled

STBY bit cleared

for SLEEP

instruction

Reset state

Interrupt source or

DMA address error occurs

NMI interrupt,

IRQ interrupt*,

Manual reset,

and Power-on reset

STBY bit set

and DEEP bit clear

for SLEEP

instruction

STBY and DEEP bits set

for SLEEP

instruction

Deep standby mode

Note: * IRQ can be released only by PE7 to PE4 and PC25 to PC22

Figure 2.6 Transitions between Processing States

SH7261 Datasheet(PDF) 96 Page - Renesas Technology Corp

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