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HD6417606 Datasheet(PDF) 49 Page - Renesas Technology Corp |
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HD6417606 Datasheet(HTML) 49 Page - Renesas Technology Corp |
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49 / 532 page  Section 2 CPU Rev. 4.00 Sep. 13, 2007 Page 23 of 502 REJ09B0239-0400 2.2.3 System Registers There are four 32-bit system registers, designated two multiply and accumulate registers (MACH and MACL), a procedure register (PR), and program counter (PC). • Multiply and accumulate registers (MAC) This register stores the results of multiplication and multiply-and-accumulate operation. • Procedure register (PR) This register stores the return-destination address from subroutine procedures. • Program counter (PC) The PC indicates the point which is four bytes (two instructions) after the current execution instruction. 2.2.4 Initial Values of Registers Table 2.1 lists the initial values of registers after a reset. Table 2.1 Initial Values of Registers Type of register Register Default General register R0 to R14 Undefined R15 (SP) SP value set in the exception handling vector table Control register SR I3 to I0: 1111 (H'F) Reserved bits: 0 Other bits: Undefined GBR Undefined VBR H'00000000 System register MACH, MACL, PR Undefined PC PC value set in the exception handling vector table |
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