HD6432351 datasheet(234/1025 Pages) RENESAS

234 / 1025 page

Section 7 DMA Controller (DMAC)

Rev. 3.00 Sep 15, 2006 page 200 of 988

REJ09B0330-0300

7.1.5

Table 7.3 summarizes the DMAC registers.

Table 7.3

DMAC Registers

Channel Name

Abbreviation R/W

Initial

Value

Address*

Bus

Width

Memory address register 0A

MAR0A

R/W

Undefined

H'FEE0

16 bits

I/O address register 0A

IOAR0A

R/W

Undefined

H'FEE4

16 bits

Transfer count register 0A

ETCR0A

R/W

Undefined

H'FEE6

16 bits

Memory address register 0B

MAR0B

R/W

Undefined

H'FEE8

16 bits

I/O address register 0B

IOAR0B

R/W

Undefined

H'FEEC

16 bits

Transfer count register 0B

ETCR0B

R/W

Undefined

H'FEEE

16 bits

Memory address register 1A

MAR1A

R/W

Undefined

H'FEF0

16 bits

I/O address register 1A

IOAR1A

R/W

Undefined

H'FEF4

16 bits

Transfer count register 1A

ETCR1A

R/W

Undefined

H'FEF6

16 bits

Memory address register 1B

MAR1B

R/W

Undefined

H'FEF8

16 bits

I/O address register 1B

IOAR1B

R/W

Undefined

H'FEFC

16 bits

Transfer count register 1B

ETCR1B

R/W

Undefined

H'FEFE

16 bits

0, 1

DMA write enable register

DMAWER

R/W

H'00

H'FF00

8 bits

DMA terminal control register DMATCR

R/W

H'00

H'FF01

8 bits

DMA control register 0A

DMACR0A

R/W

H'00

H'FF02

16 bits

DMA control register 0B

DMACR0B

R/W

H'00

H'FF03

16 bits

DMA control register 1A

DMACR1A

R/W

H'00

H'FF04

16 bits

DMA control register 1B

DMACR1B

R/W

H'00

H'FF05

16 bits

DMA band control register

DMABCR

R/W

H'0000

H'FF06

16 bits

Module stop control register

MSTPCR

R/W

H'3FFF

H'FF3C

8 bits

Note:

* Lower 16 bits of the address.

HD6432351 Datasheet(PDF) 234 Page - Renesas Technology Corp

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