HD6432351 datasheet(232/1025 Pages) RENESAS

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Section 7 DMA Controller (DMAC)

Rev. 3.00 Sep 15, 2006 page 198 of 988

REJ09B0330-0300

Table 7.1 (2) Overview of DMAC Functions (Full Address Mode)

Address Register Bit Length

Transfer Mode

Transfer Source

Source

Destination

Normal mode

• Auto-request

 Transfer request retained

internally

 Transfers continue for the

specified number of times (1 to

65536)

 Choice of burst or cycle steal

transfer

• Auto-request

• External request

 1-byte or 1-word transfer

executed for one transfer request

 1 to 65536 transfers

• External request

Block transfer mode

• Specified block size transfer

executed for one transfer request

• 1 to 65536 transfers

• Either source or destination

specifiable as block area

• Block size: 1 to 256 bytes or words

• TPU channel 0

to 5 compare

match/input

capture A

interrupt

• SCI transmission

complete

interrupt

• SCI reception

complete

interrupt

• External request

• A/D converter

conversion end

interrupt

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