HD6432351 datasheet(256/1025 Pages) RENESAS

256 / 1025 page

Section 7 DMA Controller (DMAC)

Rev. 3.00 Sep 15, 2006 page 222 of 988

REJ09B0330-0300

7.3.5

DMA Band Control Register (DMABCR)

FAE1

R/W

FAE0

R/W

—

R/W

—

R/W

DTA1

R/W

—

R/W

—

R/W

DTA0

R/W

Bit

DMABCRH

Initial value

R/W

DTME1

R/W

DTE1

R/W

DTME0

R/W

DTE0

R/W

DTIE1B

R/W

DTIE0A

R/W

DTIE1A

R/W

DTIE0B

R/W

Bit

DMABCRL

Initial value

R/W

DMABCR is a 16-bit readable/writable register that controls the operation of each DMAC

channel.

DMABCR is initialized to H'0000 by a reset, and in standby mode.

Bit 15—Full Address Enable 1 (FAE1): Specifies whether channel 1 is to be used in short

address mode or full address mode.

In full address mode, channels 1A and 1B are used together as a single channel.

Bit 15

FAE1

Description

Short address mode

(Initial value)

Full address mode

Bit 14—Full Address Enable 0 (FAE0): Specifies whether channel 0 is to be used in short

address mode or full address mode.

In full address mode, channels 0A and 0B are used together as a single channel.

Bit 14

FAE0

Description

Short address mode

(Initial value)

Full address mode

HD6432351 Datasheet(PDF) 256 Page - Renesas Technology Corp

HD6432351 Datasheet(HTML) 256 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL