HD6432351 datasheet(267/1025 Pages) RENESAS

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Section 7 DMA Controller (DMAC)

Rev. 3.00 Sep 15, 2006 page 233 of 988

REJ09B0330-0300

7.5

Operation

7.5.1

Transfer Modes

Table 7.5 lists the DMAC modes.

Table 7.5

DMAC Transfer Modes

Transfer Mode

Transfer Source

Remarks

Dual

address

mode

(1) Sequential mode

(2) Idle mode

(3) Repeat mode

Short

address

mode

(4) Single address

mode

• TPU channel 0 to 5

compare match/input

capture A interrupt

• SCI transmission

complete interrupt

• SCI reception complete

interrupt

• A/D converter

conversion end interrupt

• External request

• Up to 4 channels can

operate independently

• External request applies

to channel B only

• Single address mode

applies to channel B

only

• Modes (1) to (3) can

also be specified for

single address mode

Full

address

mode

(5) Normal mode

• External request

• Auto-request

(6) Block transfer

mode

• TPU channel 0 to 5

compare match/input

capture A interrupt

• SCI transmission

complete interrupt

• SCI reception complete

interrupt

• A/D converter

conversion end interrupt

• External request

• Max. 2-channel

operation, combining

channels A and B

• With auto-request, burst

mode transfer or cycle

steal transfer can be

selected

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