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HD6432351 Datasheet(PDF) 266 Page - Renesas Technology Corp |
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HD6432351 Datasheet(HTML) 266 Page - Renesas Technology Corp |
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266 / 1025 page  Section 7 DMA Controller (DMAC) Rev. 3.00 Sep 15, 2006 page 232 of 988 REJ09B0330-0300 7.4.3 Module Stop Control Register (MSTPCR) 15 0 R/W Bit Initial value R/W : : : 14 0 R/W 13 1 R/W 12 1 R/W 11 1 R/W 10 1 R/W 9 1 R/W 8 1 R/W 7 1 R/W 6 1 R/W 5 1 R/W 4 1 R/W 3 1 R/W 2 1 R/W 1 1 R/W 0 1 R/W MSTPCRH MSTPCRL MSTPCR is a 16-bit readable/writable register that performs module stop mode control. When the MSTP15 bit in MSTPCR is set to 1, the DMAC operation stops at the end of the bus cycle and a transition is made to module stop mode. For details, see section 20.5, Module Stop Mode. MSTPCR is initialized to H'3FFF by a reset and in hardware standby mode. It is not initialized in software standby mode. Bit 15—Module Stop (MSTP15): Specifies the DMAC module stop mode. Bits 15 MSTP15 Description 0 DMAC module stop mode cleared (Initial value) 1 DMAC module stop mode set |
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