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HD6432142 Datasheet(PDF) 612 Page - Renesas Technology Corp

Part # HD6432142
Description  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
PDF  1177 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6432142 Datasheet(HTML) 612 Page - Renesas Technology Corp

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Section 17 Keyboard Buffer Controller
Rev. 4.00 Sep 27, 2006 page 568 of 1130
REJ09B0327-0400
17.3
Operation
17.3.1
Receive Operation
In a receive operation, both KCLK (clock) and KD (data) are outputs on the keyboard side and
inputs on the H8S/2148 Group chip (system) side. KD receives a start bit, 8 data bits (LSB-first),
an odd parity bit, and a stop bit, in that order. The KD value is valid when KCLK is low. A sample
receive processing flowchart is shown in figure 17.3, and the receive timing in figure 17.4.



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