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HD6432142 Datasheet(PDF) 620 Page - Renesas Technology Corp |
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HD6432142 Datasheet(HTML) 620 Page - Renesas Technology Corp |
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620 / 1177 page ![]() Section 17 Keyboard Buffer Controller Rev. 4.00 Sep 27, 2006 page 576 of 1130 REJ09B0327-0400 17.3.4 KCLKI and KDI Read Timing Figure 17.9 shows the KCLKI and KDI read timing. T1 T2 φ* Internal read signal KCLK, KD (pin state) KCLKI, KDI (register) Internal data bus (read data) Note: * The φ clock shown here is scaled by 1/N in medium-speed mode when the operating mode is active mode. Figure 17.9 KCLKI and KDI Read Timing |
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